9–11 Oct 2024
Campus des Cordeliers, Paris, Metro Odeon
Europe/Paris timezone

Embedded FPGAs for Data Processing in Future e+e- Detectors

10 Oct 2024, 15:51
20m
Amphi Farabeuf (Campus des Cordeliers, Paris, Metro Odeon)

Amphi Farabeuf

Campus des Cordeliers, Paris, Metro Odeon

15 Rue de l'Ecole de Médecine, 75006, Paris
ORAL WG3 - Detector R&D Parallel - WG3

Speakers

Julia Gonski (SLAC National Accelerator Laboratory (US)) Julia Lynne Gonski (SLAC National Accelerator Laboratory (US))

Description

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC), enabling fast and flexible machine learning (ML) in readout electronics. Detectors at a future e+e- Higgs factory can benefit from increased intelligence throughout the data pipeline, for reduced data rates, faster inference, and increased efficiency. Furthermore, eFPGAs can be designed with a variety of open-source frameworks, lowering the cost of entry for institutional groups. This work presents recent developments of eFPGAs for collider applications, namely the design and tapeout of two eFPGAs and their ability to implement ML for at-source pixel readout. Next steps in eFPGA development are discussed, along with applications of eFPGA technology to other data processing tasks at Higgs factories and beyond.

Primary authors

Julia Gonski (SLAC National Accelerator Laboratory (US)) Julia Lynne Gonski (SLAC National Accelerator Laboratory (US))

Presentation materials