Description
Phase-2 CMS will replace the trigger and data acquisition system in preparation for the HL-LHC. This upgrade will allow a maximum accept rate of 750kHz and a latency of 12.5us. To achieve this, new electronics and firmware are being designed. We describe the first version of an algorithm capable of detecting and identifying muon showers, running in the first layer of the trigger system. It was designed to be implemented on FPGAs with minimum resource utilisation, increasing the robustness of the current algorithm. This will allow to recover efficiency compared to the current algorithm at high pt muons.
Authors
Carlos Vico
(University of Oviedo)
Daniel Estrada Acevedo
(Universidad de Oviedo)
Javier Prado
(Universidad de Oviedo)
Santiago Folgueras
(Universidad de Oviedo)
