Orateur
Description
Deterministic timing is a key enabler for the coordinated operation of accelerator and fusion facilities. This work presents WR-TTS, a White Rabbit timing and triggering system in uTCA form factor developed for distributed trigger and gate generation, event capture, and nanosecond timestamping. Based on a Xilinx Zynq UltraScale+ SoC and White Rabbit, the platform combines FPGA real-time processing with a Linux-based supervisory layer and provides up to nine configurable SMA I/O ports, 10 MHz and PPS outputs, dual SFP connectivity for White Rabbit and fast communications, and FMC/RTM expansion for subsystem-specific interfacing. The system can generate programmable pulse patterns, detect external events, and redistribute them through the network with deterministic latency, making it suitable for RF coordination, diagnostics, acquisition gating, and other time-critical functions.
WR-TTS is integrated with EPICS for configuration, readback, monitoring, and diagnostics within facility-wide control systems. A CSS Phoebus-based GUI allows operators to configure trigger type, period, duty cycle, delay, polarity, and pulse count, while near real-time feedback simplifies commissioning and operation. This approach also supports mixed environments in which time-aware devices act directly on distributed synchronized time, while non-time-aware equipment receives locally generated physical triggers and gates from the WR-TTS. In addition, the same White Rabbit infrastructure can be used for fast propagation of selected protection events, reducing cabling complexity and extending the role of the timing system beyond pure synchronization.