20–24 avr. 2026
ENS Paris-Saclay (Ecole Normale Supérieure, Université Paris Saclay)
Fuseau horaire Europe/Paris

Implementing Closed-Loop EPICS EPID Control on CompactRIO for the IPF Water Skid at LANSCE

Non programmé
20m
Amphithéâtre Alain Aspect - 1G58 (ENS Paris-Saclay (Ecole Normale Supérieure, Université Paris Saclay))

Amphithéâtre Alain Aspect - 1G58

ENS Paris-Saclay (Ecole Normale Supérieure, Université Paris Saclay)

4 Av. des Sciences, 91190 Gif-sur-Yvette
Lightning Talk Hardware, Driver/Device support

Orateur

H. R. Martin (LANL)

Description

Abstract.
As part of the Isotope Production Facility (IPF) water skid plant controls upgrade at the Los Alamos Neutron Science Center (LANSCE), we are migrating from an Allen-Bradley ControlLogix (Logix 5000) PLC (RSLogix 5000/Studio 5000) to NI (Emerson) CompactRIO (cRIO-9048)–based Experimental Physics and Industrial Control System (EPICS) input/output controllers (IOCs) using our Industrial I/O (IIO) framework. This project is the first deployment of EPICS extended PID (EPID) modules for closed-loop Proportional–Integral–Derivative (PID) control on this system at LANSCE. While the legacy PLC implemented PID, closed-loop PID had not previously been implemented on cRIOs using EPICS records at LANSCE; therefore, we are integrating EPID record support from the EPICS std module to provide loop control within the new cRIO/IOC architecture. Commissioning is underway, with validation focused on parity with the legacy PLC. In addition to loop control, the migration required translating a large PLC application with extensive interlocks and production/startup/manual mode (state-machine) logic into maintainable EPICS process variable (PV) behavior, including PV enable/disable, alarming, and permissive handling. Similar mode/state concepts exist in Linear Accelerator (LINAC) controls, but not previously at this level of functional complexity or PV volume for a production utility system. We also leverage an object-oriented IIO approach for FPGA and I/O reuse: NI card support is implemented as reusable libraries, assembled into LabVIEW FPGA designs, and compiled into bitfiles that can be reused across projects on the same cRIO class (e.g., 9048/9038).

LA-UR-26-21558

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