Projet R&T PCIe400

Europe/Paris
Description
  • Gateware: serial link and heater gateware specification

General architecture proposed : see synoptic in attached document

Most of the blocks are existing in the following repositories :

    • Direct PHY IP, refclk IP, bitroller, phy_reg_set can be found in fixed phase project from Jean-Pierre
    • PRBS generator/checker can be found in p400-lli project 
    • Heater can be found in lli-pcie40v2 on gitlab CERN project

 

A proposition to take benefits from Colibri https://gitlab.cern.ch/colibri/colibri notably for its PRBS modules. 

Another proposition is to use "Paolo's side project" using SystemRDL to define AVMM slaves for configuration registers of custom modules (bitroller, PRBS generator...). Paolo is willing to relase a version and make a demo for next meeting.

More work sessions with Guillaume and Gabriel should be organized to familiarize on LLI repos and start writing a specification document. 

 

 

 

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    • 14:20 14:40
      Software : p400 user case 20m

      Proposal for a new package to manage peripheral mapping, scenarios, ...

      Orateur: Renaud Le Gac (CPPM CNRS/IN2P3)