Description
Precision space instrumentation requires a rigorous accounting of noise sources that deviate from ideal models. While traditional differential Low-Noise Amplifier (LNA) design focuses on intrinsic thermal and shot noise, stochastic transistor mismatch presents a critical bottleneck in reaching the theoretical noise floor. Specifically, the non-ideal elevation of flicker noise is dramatically magnified by these imbalances.
This presentation delivers an analytical framework to quantify LNA input-referred noise arising from design and fabrication offsets. We derive mathematical relationships between load, transconductance ($g_m$), and geometric mismatches, focusing on their role in degrading the Common-Mode Rejection Ratio (CMRR) and Power-Supply Rejection Ratio (PSRR). Our model characterizes these imbalances as a primary driver for the common-mode-to-differential conversion of tail current source noise into the signal path. The framework is validated through Monte Carlo simulations and measurement results from a dedicated IHP 130nm BiCMOS SiGe integrated circuit, providing a robust methodology for optimizing high-sensitivity readout chains design in extreme space environments
| Speaker information | PhD 3rd year |
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