65 nm meeting

mercredi 24 août 2022, 10:30 → 12:30 Europe/Paris

Bat 20 - uElec (https://cern.zoom.us/j/69600555186?pwd=eVcxUTBnc2J0bWwyQ3RBM0ttZkN6Zz09)

• Tests
  • Yitao looked on C and D version data, some modifications needed, obtained some plots on charge sharing
    • still available a bit for the framework development if needed
    • issue about the Y alignment remains (still about 1 um offset after changing the threshold)
      • seems that alignment for Y-axis needs to be done on each submatrix separately
      • does not happen in X, we don’t know why (connected to shift movement during runs?)
    • issue about charge saturation, effect seen on APTS as well but not clear how to handle
  • Ziad did progress on automated scripts, should be done within a month
    • can then proceed with analysis of all runs
    • about the way to align: it is also included as a step of the automated procedure
  • Selection of one pixel in DAQ
    • done by Kimmo for any pixel and acquisition of 65000 points in time
    • Andrei and Kimmo preparing how to perform the analysis on such huge data
    • Andrei is continuing simulation to reproduce signal shape and figure out what is the leakage current
      • especially, try to extract individual pixel leakage current online to figure out dispersion
    • RTS seen from wafeforms with same software,
      • issue with limitation on DAQboard memory might make any quantitative estimation difficult
      • Szymon will come to that study once the leakage current is done

 

• MOSS design, Xiachao
  • version with LVS matching OK
  • still issue with DRC though
  • working on extraction of parasitics between row steering block and matrix, almost ready
  • after parasitics extraction, timing simulation at CERN
  • Jean doing simulation of power consumption with time for the priority encoder while it handles hits

 

• MOST design, Szymon
  • similar to MOSS: LVS OK, DRC understanding on-going (no issue expected)
  • verification kind of pending (especially top-level requires extraction…)
  • all-inclusive (from hits to output) simulation with analogue tool is being setup, started by Szymon

==> Note that Walter leaves for vacation in 1 month, GDS needs to be ready by then!

 

• CE65v2 design, Andrei
  • design was changed from layout of 1.5 months due match some custom design rules
  • major functionalities added during that period:
    • Pwell and Subtrate biases separated
    • digital structure changed to program any sub-matrix read-out (discussed with Kimmo)
  • Isabelle is doing extraction to check timing OK, almost done, should be fine
  • was sent a week ago and Walter confirmed it is fine

 

• Readout architecture, Jean 
  • JOULE tool used to evaluate power and hit-rate from a code implementation (no layout)
  • evaluation of the area required by the asynchronous readout
  • currently evaluating timing (timing constraint file), not easy since design tools expect synchronous operation

 

=> NEXT meeting Wednesday September 7th

 

1 Test discussion

Orateurs: Andrei Dorokhov (IPHC), Dr Serhiy Senyukov (Institut Pluridisciplinaire Hubert CURIEN (IPHC)), Szymon Bugiel (IPHC), Yitao WU (USTC & IPHC)

2 MOSS design

Orateurs: Frédéric MOREL (IPHC), XIAOCHAO FANG

3 MOST design

Orateur: Szymon Bugiel (IPHC)

4 CE-65++

Orateur: Andrei Dorokhov (IPHC)

5 Readout architecture

Orateur: Jean SOUDIER (IPHC)