FemArray_ReceiveLoop: started CmdFetcher_Main: started --------------------------------- Client version : 2.11 Compiled : Dec 5 2024 at 14:24:00 Target Server : TDCM Commands : from stdin --------------------------------- (0) >srv(00).cmd(0): be dcbal_enc 1 0 Tdcm(0) Reg(3) <- 0x80000 srv(00).cmd(0): be inv_tdcm_mosi 0 0 Tdcm(0) Reg(3) <- 0x0 srv(00).cmd(0): be fe active fe_workset 0 Tdcm(0) Reg(10) <- 0x1 srv(00).cmd(0): be sel_fe fe_workset 0 Tdcm(0) Selected_FE <- 00 srv(00).cmd(0): be iic sfpmezz 0 enable fe_workset 0 Tdcm(0) SFP Mezzanine 0 Tx_Disable <- 0xfffe srv(00).cmd(0): be tx_reset 1 0 Tdcm(0) Reg(3) <- 0x00010000 srv(00).cmd(0): be rx_reset fe_workset cycle 0 Tdcm(0) Reg(0) <- 0x00010000 <- 0x00000000 (done on 1 FE(s)) srv(00).cmd(0): be tx_reset 0 0 Tdcm(0) Reg(3) <- 0x00000000 srv(00).cmd(0): sleep 4 srv(00).cmd(0): be dna get 0 Tdcm(0): Errors: 0 DNA_Found: 1 srv(00).cmd(0): be dna push 0 Tdcm(0): Errors: 0 DNA-ID_Pushed: 1 srv(00).cmd(0): be dna get 0 Tdcm(0): Errors: 0 DNA_Found: 1 srv(00).cmd(0): fe dna show 0 Tdcm(0): Fem(00) DNA: 89000002 4d14dc26 got_dna: 1 id_is_set: 1 my_id: 0 srv(00).cmd(0): fe sca enable 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena 0x0 0 Tdcm(0) Reg(4) <- 0x0 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be eb run 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): fe delay_adc dco 0 0xF 0 Tdcm(0) Fem(00) Reg(14) <- 0xf Delay_dco(0) <- 15 srv(00).cmd(0): fe delay_adc dco 1 0xF 0 Tdcm(0) Fem(00) Reg(14) <- 0xf0 Delay_dco(1) <- 15 srv(00).cmd(0): fe delay_adc fco 0 0x0 0 Tdcm(0) Fem(00) Reg(14) <- 0x0 Delay_fco(0) <- 0 srv(00).cmd(0): fe delay_adc fco 1 0x0 0 Tdcm(0) Fem(00) Reg(14) <- 0x0 Delay_fco(1) <- 0 srv(00).cmd(0): fe delay_adc pipe 0 0x8 0 Tdcm(0) Fem(00) Reg(14) <- 0x80000 Delay_pipe(0) <- 8 srv(00).cmd(0): fe delay_adc pipe 1 0x8 0 Tdcm(0) Fem(00) Reg(14) <- 0x80000 Delay_pipe(1) <- 8 srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: (0) >srv(00).cmd(0): fe sca enable 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena 0x0 0 Tdcm(0) Reg(4) <- 0x0 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be eb run 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): fe mode after 0 Tdcm(0) Fem(00) Reg(0) <- 0x400 srv(00).cmd(0): fe fec_mask 0x2 0 Tdcm(0) Fem(00) Reg(1) <- 0x200000 srv(00).cmd(0): fe fec_enable 0x1 0 Tdcm(0) Fem(00) Reg(1) <- 0x40000 srv(00).cmd(0): fe asic_mask 0xFF00 0 Tdcm(0) Fem(00) Reg(9) <- 0xff000000 srv(00).cmd(0): fe test_enable 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_mode 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_zbt 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe adc 0 model AD9637 0 Tdcm(0) Fem(00) ADC_model <- 3 (AD9637) srv(00).cmd(0): fe adc 0 write 0x14 0x00 0 Tdcm(0) Fem(00) Front-End ADC Reg(20) <- 0x0 (0) srv(00).cmd(0): fe adc 1 model AD9637 0 Tdcm(0) Fem(00) ADC_model <- 3 (AD9637) srv(00).cmd(0): fe adc 1 write 0x14 0x00 0 Tdcm(0) Fem(00) Front-End ADC Reg(20) <- 0x0 (0) srv(00).cmd(0): fe after 0:15 gain 120 0 Tdcm(0) Fem(00) After(0:15) Reg(1) <- Gain=120fC srv(00).cmd(0): fe after 0:15 time 412 0 Tdcm(0) Fem(00) After(0:15) Reg(1) <- Shaping=412ns srv(00).cmd(0): fe after 0:15 write 2 0x0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- 0x0 (wrote 16 chip(s)) srv(00).cmd(0): fe after 0:15 en_mkr_rst 1 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Marker=1 srv(00).cmd(0): fe after 0:15 rst_level 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Marker_Level=0 srv(00).cmd(0): fe after 0:15 rd_from_0 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Read_From_0=0 srv(00).cmd(0): fe after 0:15 test_digout 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Test_Digout=0 srv(00).cmd(0): fe polarity 0:15 0x0 0 Tdcm(0) Fem(00) Reg(3) <- 0x0 (performed 16 actions) srv(00).cmd(0): fe forceon_all 0x1 0 Tdcm(0) Fem(00) Reg(0) <- 0x1000 srv(00).cmd(0): fe sca cnt 0x1fe 0 Tdcm(0) Fem(00) Reg(0) <- 0x1fe srv(00).cmd(0): fe sca wckdiv 0x4 0 Tdcm(0) Fem(00) Reg(5) <- 0x40000 srv(00).cmd(0): fe crc32_insert_ena 1 0 Tdcm(0) Fem(00) Reg(6) <- 0x40 srv(00).cmd(0): fe keep_fco 0x0 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 srv(00).cmd(0): fe rst_len 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x800 srv(00).cmd(0): fe skip_rst 0x0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe keep_rst 0x1 0 Tdcm(0) Fem(00) Reg(0) <- 0x10000 srv(00).cmd(0): fe emit_lst_cell_rd 0x1 0 Tdcm(0) Fem(00) Reg(5) <- 0x2000 srv(00).cmd(0): fe trig_ena 0x8 0 Tdcm(0) Fem(00) Reg(2) <- 0x80000000 srv(00).cmd(0): fe sca enable 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x100000 srv(00).cmd(0): fe fra_timeout 0 0 Tdcm(0) Fem(00) Reg(6) <- 0x0 srv(00).cmd(0): sleep 1 srv(00).cmd(0): be crc32_check_ena 1 0 Tdcm(0) Reg(3) <- 0x00000020 srv(00).cmd(0): be serve_target 1 0 Tdcm(0) Serve_Target <- 1 srv(00).cmd(0): be pump timed 1 0 Tdcm(0) Reg(0) <- 0x40000 srv(00).cmd(0): be pump timeout 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena fe_workset 0 Tdcm(0) Reg(4) <- 0x1 srv(00).cmd(0): be eb keep_fem_soe 1 0 Tdcm(0) Reg(0) <- 0x400000 srv(00).cmd(0): be eb check_ev_nb 1 0 Tdcm(0) Reg(0) <- 0x800000 srv(00).cmd(0): be eb check_ev_ts 1 0 Tdcm(0) Reg(0) <- 0x1000000 srv(00).cmd(0): be eb ts_tolerance 0 0 Tdcm(0) Reg(0) = 0x1c40000 (29622272) Time_Stamp_Tolerance +/-: 0 srv(00).cmd(0): be eb run 1 0 Tdcm(0) Reg(0) <- 0x200000 srv(00).cmd(0): be read_abort_ena 0 0 Tdcm(0) Reg(14) <- 0x0 srv(00).cmd(0): be event_limit 0x1 0 Tdcm(0) Reg(6) <- 0x200 srv(00).cmd(0): be trig_rate 1 10 0 Tdcm(0) Reg(6) <- 0x8a srv(00).cmd(0): fe subtract_ped 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe zero_suppress 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe hped 0:15 * offset 0 0 Tdcm(0) Fem(00): hped offset done on 1264 histograms. Underflow: 0 Overflow: 0 ped: 0 srv(00).cmd(0): fe hped 0:15 * clr 0 Tdcm(0) Fem(00): hped clr done on 1264 histograms. Underflow: 0 Overflow: 0 srv(00).cmd(0): be serve_target 2 0 Tdcm(0) Serve_Target <- 2 srv(00).cmd(0): be isobus 0x0C 0 Tdcm(0) Reg(5) <- 0x0000000c ( CLR_EVCNT CLR_TSTAMP auto-clear) srv(00).cmd(0): be isobus 0x20 0 Tdcm(0) Reg(5) <- 0x00000020 ( SCA_START auto-clear) srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): fe hped 0 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 00 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 00 Channel 01 Mean/Std_dev : 662.93 8.36 Card 00 Chip 00 Channel 02 Mean/Std_dev : 340.79 0.93 Card 00 Chip 00 Channel 03 Mean/Std_dev : 294.54 5.77 Card 00 Chip 00 Channel 04 Mean/Std_dev : 269.08 3.38 Card 00 Chip 00 Channel 05 Mean/Std_dev : 273.38 5.71 Card 00 Chip 00 Channel 06 Mean/Std_dev : 271.04 3.41 Card 00 Chip 00 Channel 07 Mean/Std_dev : 246.63 5.44 Card 00 Chip 00 Channel 08 Mean/Std_dev : 279.21 3.40 Card 00 Chip 00 Channel 09 Mean/Std_dev : 281.83 5.60 Card 00 Chip 00 Channel 10 Mean/Std_dev : 259.98 3.36 Card 00 Chip 00 Channel 11 Mean/Std_dev : 345.60 5.48 Card 00 Chip 00 Channel 12 Mean/Std_dev : 294.45 3.26 Card 00 Chip 00 Channel 13 Mean/Std_dev : 364.67 5.04 Card 00 Chip 00 Channel 14 Mean/Std_dev : 286.36 3.30 Card 00 Chip 00 Channel 15 Mean/Std_dev : 389.22 1.72 Card 00 Chip 00 Channel 16 Mean/Std_dev : 305.89 5.02 Card 00 Chip 00 Channel 17 Mean/Std_dev : 312.02 3.36 Card 00 Chip 00 Channel 18 Mean/Std_dev : 284.03 4.99 Card 00 Chip 00 Channel 19 Mean/Std_dev : 288.94 3.37 Card 00 Chip 00 Channel 20 Mean/Std_dev : 239.40 4.97 Card 00 Chip 00 Channel 21 Mean/Std_dev : 149.83 3.59 Card 00 Chip 00 Channel 22 Mean/Std_dev : 280.20 5.01 Card 00 Chip 00 Channel 23 Mean/Std_dev : 212.75 3.40 Card 00 Chip 00 Channel 24 Mean/Std_dev : 268.03 4.86 Card 00 Chip 00 Channel 25 Mean/Std_dev : 379.39 3.28 Card 00 Chip 00 Channel 26 Mean/Std_dev : 247.29 4.77 Card 00 Chip 00 Channel 27 Mean/Std_dev : 237.69 3.58 Card 00 Chip 00 Channel 28 Mean/Std_dev : 283.21 1.84 Card 00 Chip 00 Channel 29 Mean/Std_dev : 340.21 4.73 Card 00 Chip 00 Channel 30 Mean/Std_dev : 301.98 3.37 Card 00 Chip 00 Channel 31 Mean/Std_dev : 271.88 4.62 Card 00 Chip 00 Channel 32 Mean/Std_dev : 234.82 3.26 Card 00 Chip 00 Channel 33 Mean/Std_dev : 293.45 4.57 Card 00 Chip 00 Channel 34 Mean/Std_dev : 214.38 3.39 Card 00 Chip 00 Channel 35 Mean/Std_dev : 290.36 4.71 Card 00 Chip 00 Channel 36 Mean/Std_dev : 314.71 3.42 Card 00 Chip 00 Channel 37 Mean/Std_dev : 339.78 4.36 Card 00 Chip 00 Channel 38 Mean/Std_dev : 263.17 3.39 Card 00 Chip 00 Channel 39 Mean/Std_dev : 228.72 4.16 Card 00 Chip 00 Channel 40 Mean/Std_dev : 264.36 3.43 Card 00 Chip 00 Channel 41 Mean/Std_dev : 313.41 3.27 Card 00 Chip 00 Channel 42 Mean/Std_dev : 314.64 4.55 Card 00 Chip 00 Channel 43 Mean/Std_dev : 258.88 3.30 Card 00 Chip 00 Channel 44 Mean/Std_dev : 327.83 4.56 Card 00 Chip 00 Channel 45 Mean/Std_dev : 240.96 3.41 Card 00 Chip 00 Channel 46 Mean/Std_dev : 225.36 4.64 Card 00 Chip 00 Channel 47 Mean/Std_dev : 336.27 3.41 Card 00 Chip 00 Channel 48 Mean/Std_dev : 324.52 4.68 Card 00 Chip 00 Channel 49 Mean/Std_dev : 280.85 3.28 Card 00 Chip 00 Channel 50 Mean/Std_dev : 205.37 4.72 Card 00 Chip 00 Channel 51 Mean/Std_dev : 223.45 3.20 Card 00 Chip 00 Channel 52 Mean/Std_dev : 299.67 4.84 Card 00 Chip 00 Channel 53 Mean/Std_dev : 282.25 1.66 Card 00 Chip 00 Channel 54 Mean/Std_dev : 319.02 3.28 Card 00 Chip 00 Channel 55 Mean/Std_dev : 317.18 4.72 Card 00 Chip 00 Channel 56 Mean/Std_dev : 237.29 3.24 Card 00 Chip 00 Channel 57 Mean/Std_dev : 361.51 4.82 Card 00 Chip 00 Channel 58 Mean/Std_dev : 285.44 3.10 Card 00 Chip 00 Channel 59 Mean/Std_dev : 185.16 4.90 Card 00 Chip 00 Channel 60 Mean/Std_dev : 172.13 3.25 Card 00 Chip 00 Channel 61 Mean/Std_dev : 283.55 4.91 Card 00 Chip 00 Channel 62 Mean/Std_dev : 279.38 3.23 Card 00 Chip 00 Channel 63 Mean/Std_dev : 336.46 5.04 Card 00 Chip 00 Channel 64 Mean/Std_dev : 317.26 3.28 Card 00 Chip 00 Channel 65 Mean/Std_dev : 250.82 4.92 Card 00 Chip 00 Channel 66 Mean/Std_dev : 279.96 1.53 Card 00 Chip 00 Channel 67 Mean/Std_dev : 216.90 3.19 Card 00 Chip 00 Channel 68 Mean/Std_dev : 247.83 5.01 Card 00 Chip 00 Channel 69 Mean/Std_dev : 282.92 3.20 Card 00 Chip 00 Channel 70 Mean/Std_dev : 312.64 5.09 Card 00 Chip 00 Channel 71 Mean/Std_dev : 258.80 3.39 Card 00 Chip 00 Channel 72 Mean/Std_dev : 246.48 5.07 Card 00 Chip 00 Channel 73 Mean/Std_dev : 274.46 3.25 Card 00 Chip 00 Channel 74 Mean/Std_dev : 347.15 5.18 Card 00 Chip 00 Channel 75 Mean/Std_dev : 273.56 3.30 Card 00 Chip 00 Channel 76 Mean/Std_dev : 333.15 5.22 Card 00 Chip 00 Channel 77 Mean/Std_dev : 312.78 3.39 Card 00 Chip 00 Channel 78 Mean/Std_dev : 261.80 5.19 ----- End of Frame ----- srv(00).cmd(0): fe hped 1 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 01 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 01 Channel 01 Mean/Std_dev : 651.69 9.23 Card 00 Chip 01 Channel 02 Mean/Std_dev : 336.55 1.00 Card 00 Chip 01 Channel 03 Mean/Std_dev : 328.62 6.05 Card 00 Chip 01 Channel 04 Mean/Std_dev : 248.69 3.56 Card 00 Chip 01 Channel 05 Mean/Std_dev : 236.03 6.10 Card 00 Chip 01 Channel 06 Mean/Std_dev : 256.29 3.44 Card 00 Chip 01 Channel 07 Mean/Std_dev : 316.22 5.83 Card 00 Chip 01 Channel 08 Mean/Std_dev : 292.38 3.47 Card 00 Chip 01 Channel 09 Mean/Std_dev : 332.94 5.71 Card 00 Chip 01 Channel 10 Mean/Std_dev : 332.49 3.44 Card 00 Chip 01 Channel 11 Mean/Std_dev : 376.00 5.37 Card 00 Chip 01 Channel 12 Mean/Std_dev : 319.83 3.43 Card 00 Chip 01 Channel 13 Mean/Std_dev : 295.54 5.29 Card 00 Chip 01 Channel 14 Mean/Std_dev : 249.59 3.35 Card 00 Chip 01 Channel 15 Mean/Std_dev : 327.84 1.69 Card 00 Chip 01 Channel 16 Mean/Std_dev : 301.60 5.33 Card 00 Chip 01 Channel 17 Mean/Std_dev : 234.34 3.42 Card 00 Chip 01 Channel 18 Mean/Std_dev : 287.50 5.29 Card 00 Chip 01 Channel 19 Mean/Std_dev : 288.04 3.43 Card 00 Chip 01 Channel 20 Mean/Std_dev : 300.67 5.03 Card 00 Chip 01 Channel 21 Mean/Std_dev : 319.21 3.34 Card 00 Chip 01 Channel 22 Mean/Std_dev : 324.33 5.09 Card 00 Chip 01 Channel 23 Mean/Std_dev : 236.63 3.40 Card 00 Chip 01 Channel 24 Mean/Std_dev : 293.19 4.97 Card 00 Chip 01 Channel 25 Mean/Std_dev : 351.79 3.50 Card 00 Chip 01 Channel 26 Mean/Std_dev : 248.53 4.79 Card 00 Chip 01 Channel 27 Mean/Std_dev : 345.09 3.45 Card 00 Chip 01 Channel 28 Mean/Std_dev : 345.41 1.88 Card 00 Chip 01 Channel 29 Mean/Std_dev : 302.40 4.95 Card 00 Chip 01 Channel 30 Mean/Std_dev : 223.53 3.42 Card 00 Chip 01 Channel 31 Mean/Std_dev : 315.49 4.80 Card 00 Chip 01 Channel 32 Mean/Std_dev : 340.86 3.47 Card 00 Chip 01 Channel 33 Mean/Std_dev : 279.52 4.71 Card 00 Chip 01 Channel 34 Mean/Std_dev : 299.66 3.51 Card 00 Chip 01 Channel 35 Mean/Std_dev : 342.86 4.69 Card 00 Chip 01 Channel 36 Mean/Std_dev : 237.20 3.52 Card 00 Chip 01 Channel 37 Mean/Std_dev : 295.38 4.61 Card 00 Chip 01 Channel 38 Mean/Std_dev : 276.20 3.46 Card 00 Chip 01 Channel 39 Mean/Std_dev : 286.28 4.10 Card 00 Chip 01 Channel 40 Mean/Std_dev : 315.44 3.32 Card 00 Chip 01 Channel 41 Mean/Std_dev : 286.20 3.30 Card 00 Chip 01 Channel 42 Mean/Std_dev : 414.19 4.91 Card 00 Chip 01 Channel 43 Mean/Std_dev : 275.08 3.19 Card 00 Chip 01 Channel 44 Mean/Std_dev : 320.28 4.79 Card 00 Chip 01 Channel 45 Mean/Std_dev : 319.74 3.22 Card 00 Chip 01 Channel 46 Mean/Std_dev : 280.58 4.99 Card 00 Chip 01 Channel 47 Mean/Std_dev : 305.37 3.35 Card 00 Chip 01 Channel 48 Mean/Std_dev : 277.32 4.98 Card 00 Chip 01 Channel 49 Mean/Std_dev : 322.75 3.24 Card 00 Chip 01 Channel 50 Mean/Std_dev : 352.35 5.07 Card 00 Chip 01 Channel 51 Mean/Std_dev : 305.72 3.27 Card 00 Chip 01 Channel 52 Mean/Std_dev : 257.28 5.08 Card 00 Chip 01 Channel 53 Mean/Std_dev : 263.16 1.59 Card 00 Chip 01 Channel 54 Mean/Std_dev : 238.55 3.56 Card 00 Chip 01 Channel 55 Mean/Std_dev : 350.63 5.10 Card 00 Chip 01 Channel 56 Mean/Std_dev : 338.50 3.33 Card 00 Chip 01 Channel 57 Mean/Std_dev : 315.79 5.04 Card 00 Chip 01 Channel 58 Mean/Std_dev : 307.87 3.33 Card 00 Chip 01 Channel 59 Mean/Std_dev : 322.98 5.18 Card 00 Chip 01 Channel 60 Mean/Std_dev : 298.28 3.29 Card 00 Chip 01 Channel 61 Mean/Std_dev : 338.26 5.09 Card 00 Chip 01 Channel 62 Mean/Std_dev : 288.35 3.39 Card 00 Chip 01 Channel 63 Mean/Std_dev : 338.55 5.27 Card 00 Chip 01 Channel 64 Mean/Std_dev : 306.65 3.20 Card 00 Chip 01 Channel 65 Mean/Std_dev : 279.29 5.27 Card 00 Chip 01 Channel 66 Mean/Std_dev : 249.61 1.54 Card 00 Chip 01 Channel 67 Mean/Std_dev : 317.88 3.49 Card 00 Chip 01 Channel 68 Mean/Std_dev : 269.08 5.46 Card 00 Chip 01 Channel 69 Mean/Std_dev : 283.26 3.25 Card 00 Chip 01 Channel 70 Mean/Std_dev : 299.89 5.29 Card 00 Chip 01 Channel 71 Mean/Std_dev : 255.21 3.32 Card 00 Chip 01 Channel 72 Mean/Std_dev : 250.30 5.36 Card 00 Chip 01 Channel 73 Mean/Std_dev : 283.47 3.22 Card 00 Chip 01 Channel 74 Mean/Std_dev : 250.60 5.57 Card 00 Chip 01 Channel 75 Mean/Std_dev : 334.73 3.42 Card 00 Chip 01 Channel 76 Mean/Std_dev : 224.06 5.42 Card 00 Chip 01 Channel 77 Mean/Std_dev : 290.34 3.34 Card 00 Chip 01 Channel 78 Mean/Std_dev : 310.31 5.43 ----- End of Frame ----- srv(00).cmd(0): fe hped 2 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 02 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 02 Channel 01 Mean/Std_dev : 865.12 8.32 Card 00 Chip 02 Channel 02 Mean/Std_dev : 398.15 1.14 Card 00 Chip 02 Channel 03 Mean/Std_dev : 462.80 6.74 Card 00 Chip 02 Channel 04 Mean/Std_dev : 305.78 3.62 Card 00 Chip 02 Channel 05 Mean/Std_dev : 350.50 6.50 Card 00 Chip 02 Channel 06 Mean/Std_dev : 294.84 3.50 Card 00 Chip 02 Channel 07 Mean/Std_dev : 304.29 6.40 Card 00 Chip 02 Channel 08 Mean/Std_dev : 355.95 3.42 Card 00 Chip 02 Channel 09 Mean/Std_dev : 356.74 6.18 Card 00 Chip 02 Channel 10 Mean/Std_dev : 320.17 3.48 Card 00 Chip 02 Channel 11 Mean/Std_dev : 345.26 5.90 Card 00 Chip 02 Channel 12 Mean/Std_dev : 371.34 3.69 Card 00 Chip 02 Channel 13 Mean/Std_dev : 347.78 5.84 Card 00 Chip 02 Channel 14 Mean/Std_dev : 335.31 3.59 Card 00 Chip 02 Channel 15 Mean/Std_dev : 295.09 1.71 Card 00 Chip 02 Channel 16 Mean/Std_dev : 336.32 5.89 Card 00 Chip 02 Channel 17 Mean/Std_dev : 385.42 3.49 Card 00 Chip 02 Channel 18 Mean/Std_dev : 303.50 5.90 Card 00 Chip 02 Channel 19 Mean/Std_dev : 327.28 3.51 Card 00 Chip 02 Channel 20 Mean/Std_dev : 366.28 5.55 Card 00 Chip 02 Channel 21 Mean/Std_dev : 351.29 3.56 Card 00 Chip 02 Channel 22 Mean/Std_dev : 370.60 5.53 Card 00 Chip 02 Channel 23 Mean/Std_dev : 329.78 3.41 Card 00 Chip 02 Channel 24 Mean/Std_dev : 305.32 5.32 Card 00 Chip 02 Channel 25 Mean/Std_dev : 334.27 3.51 Card 00 Chip 02 Channel 26 Mean/Std_dev : 374.50 5.42 Card 00 Chip 02 Channel 27 Mean/Std_dev : 333.71 3.54 Card 00 Chip 02 Channel 28 Mean/Std_dev : 277.47 1.88 Card 00 Chip 02 Channel 29 Mean/Std_dev : 340.08 5.26 Card 00 Chip 02 Channel 30 Mean/Std_dev : 327.00 3.45 Card 00 Chip 02 Channel 31 Mean/Std_dev : 344.04 5.06 Card 00 Chip 02 Channel 32 Mean/Std_dev : 379.04 3.52 Card 00 Chip 02 Channel 33 Mean/Std_dev : 372.35 5.01 Card 00 Chip 02 Channel 34 Mean/Std_dev : 405.42 3.56 Card 00 Chip 02 Channel 35 Mean/Std_dev : 386.16 4.95 Card 00 Chip 02 Channel 36 Mean/Std_dev : 337.18 3.40 Card 00 Chip 02 Channel 37 Mean/Std_dev : 264.91 4.92 Card 00 Chip 02 Channel 38 Mean/Std_dev : 348.14 3.48 Card 00 Chip 02 Channel 39 Mean/Std_dev : 290.26 4.26 Card 00 Chip 02 Channel 40 Mean/Std_dev : 377.36 3.46 Card 00 Chip 02 Channel 41 Mean/Std_dev : 366.52 3.37 Card 00 Chip 02 Channel 42 Mean/Std_dev : 374.68 5.18 Card 00 Chip 02 Channel 43 Mean/Std_dev : 256.05 3.40 Card 00 Chip 02 Channel 44 Mean/Std_dev : 319.95 5.32 Card 00 Chip 02 Channel 45 Mean/Std_dev : 336.09 3.53 Card 00 Chip 02 Channel 46 Mean/Std_dev : 322.96 5.30 Card 00 Chip 02 Channel 47 Mean/Std_dev : 328.82 3.38 Card 00 Chip 02 Channel 48 Mean/Std_dev : 378.88 5.25 Card 00 Chip 02 Channel 49 Mean/Std_dev : 291.00 3.66 Card 00 Chip 02 Channel 50 Mean/Std_dev : 357.80 5.18 Card 00 Chip 02 Channel 51 Mean/Std_dev : 302.96 3.61 Card 00 Chip 02 Channel 52 Mean/Std_dev : 390.30 5.24 Card 00 Chip 02 Channel 53 Mean/Std_dev : 303.19 1.72 Card 00 Chip 02 Channel 54 Mean/Std_dev : 394.88 3.38 Card 00 Chip 02 Channel 55 Mean/Std_dev : 346.77 5.37 Card 00 Chip 02 Channel 56 Mean/Std_dev : 385.72 3.40 Card 00 Chip 02 Channel 57 Mean/Std_dev : 302.34 5.36 Card 00 Chip 02 Channel 58 Mean/Std_dev : 445.00 3.49 Card 00 Chip 02 Channel 59 Mean/Std_dev : 319.23 5.36 Card 00 Chip 02 Channel 60 Mean/Std_dev : 352.90 3.37 Card 00 Chip 02 Channel 61 Mean/Std_dev : 257.70 5.54 Card 00 Chip 02 Channel 62 Mean/Std_dev : 423.19 3.47 Card 00 Chip 02 Channel 63 Mean/Std_dev : 429.75 5.60 Card 00 Chip 02 Channel 64 Mean/Std_dev : 328.64 3.44 Card 00 Chip 02 Channel 65 Mean/Std_dev : 301.07 5.56 Card 00 Chip 02 Channel 66 Mean/Std_dev : 375.49 1.67 Card 00 Chip 02 Channel 67 Mean/Std_dev : 301.87 3.38 Card 00 Chip 02 Channel 68 Mean/Std_dev : 340.41 5.39 Card 00 Chip 02 Channel 69 Mean/Std_dev : 390.92 3.30 Card 00 Chip 02 Channel 70 Mean/Std_dev : 341.18 5.57 Card 00 Chip 02 Channel 71 Mean/Std_dev : 366.19 3.37 Card 00 Chip 02 Channel 72 Mean/Std_dev : 332.86 5.58 Card 00 Chip 02 Channel 73 Mean/Std_dev : 278.92 3.51 Card 00 Chip 02 Channel 74 Mean/Std_dev : 327.53 5.72 Card 00 Chip 02 Channel 75 Mean/Std_dev : 336.52 3.39 Card 00 Chip 02 Channel 76 Mean/Std_dev : 382.68 5.81 Card 00 Chip 02 Channel 77 Mean/Std_dev : 273.56 3.51 Card 00 Chip 02 Channel 78 Mean/Std_dev : 322.48 5.86 ----- End of Frame ----- srv(00).cmd(0): fe hped 3 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 03 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 03 Channel 01 Mean/Std_dev : 743.99 8.97 Card 00 Chip 03 Channel 02 Mean/Std_dev : 371.81 1.25 Card 00 Chip 03 Channel 03 Mean/Std_dev : 365.76 8.19 Card 00 Chip 03 Channel 04 Mean/Std_dev : 382.97 3.89 Card 00 Chip 03 Channel 05 Mean/Std_dev : 338.40 7.85 Card 00 Chip 03 Channel 06 Mean/Std_dev : 291.57 3.93 Card 00 Chip 03 Channel 07 Mean/Std_dev : 385.48 7.59 Card 00 Chip 03 Channel 08 Mean/Std_dev : 356.63 3.70 Card 00 Chip 03 Channel 09 Mean/Std_dev : 321.82 7.04 Card 00 Chip 03 Channel 10 Mean/Std_dev : 360.40 3.81 Card 00 Chip 03 Channel 11 Mean/Std_dev : 336.38 6.87 Card 00 Chip 03 Channel 12 Mean/Std_dev : 336.88 3.63 Card 00 Chip 03 Channel 13 Mean/Std_dev : 290.62 6.95 Card 00 Chip 03 Channel 14 Mean/Std_dev : 355.91 3.65 Card 00 Chip 03 Channel 15 Mean/Std_dev : 273.21 1.74 Card 00 Chip 03 Channel 16 Mean/Std_dev : 321.43 6.91 Card 00 Chip 03 Channel 17 Mean/Std_dev : 339.07 3.63 Card 00 Chip 03 Channel 18 Mean/Std_dev : 261.40 6.69 Card 00 Chip 03 Channel 19 Mean/Std_dev : 366.15 3.65 Card 00 Chip 03 Channel 20 Mean/Std_dev : 367.77 6.60 Card 00 Chip 03 Channel 21 Mean/Std_dev : 296.18 3.82 Card 00 Chip 03 Channel 22 Mean/Std_dev : 344.50 6.49 Card 00 Chip 03 Channel 23 Mean/Std_dev : 397.32 3.79 Card 00 Chip 03 Channel 24 Mean/Std_dev : 314.72 6.38 Card 00 Chip 03 Channel 25 Mean/Std_dev : 361.83 3.75 Card 00 Chip 03 Channel 26 Mean/Std_dev : 415.15 6.21 Card 00 Chip 03 Channel 27 Mean/Std_dev : 336.94 3.79 Card 00 Chip 03 Channel 28 Mean/Std_dev : 275.83 1.91 Card 00 Chip 03 Channel 29 Mean/Std_dev : 371.16 6.13 Card 00 Chip 03 Channel 30 Mean/Std_dev : 333.93 3.74 Card 00 Chip 03 Channel 31 Mean/Std_dev : 308.24 5.90 Card 00 Chip 03 Channel 32 Mean/Std_dev : 273.42 3.89 Card 00 Chip 03 Channel 33 Mean/Std_dev : 424.32 5.72 Card 00 Chip 03 Channel 34 Mean/Std_dev : 364.58 3.86 Card 00 Chip 03 Channel 35 Mean/Std_dev : 375.21 5.74 Card 00 Chip 03 Channel 36 Mean/Std_dev : 354.23 3.64 Card 00 Chip 03 Channel 37 Mean/Std_dev : 378.23 5.59 Card 00 Chip 03 Channel 38 Mean/Std_dev : 286.63 3.77 Card 00 Chip 03 Channel 39 Mean/Std_dev : 309.75 4.97 Card 00 Chip 03 Channel 40 Mean/Std_dev : 266.12 3.70 Card 00 Chip 03 Channel 41 Mean/Std_dev : 384.01 3.93 Card 00 Chip 03 Channel 42 Mean/Std_dev : 358.34 6.18 Card 00 Chip 03 Channel 43 Mean/Std_dev : 397.82 3.85 Card 00 Chip 03 Channel 44 Mean/Std_dev : 243.89 6.17 Card 00 Chip 03 Channel 45 Mean/Std_dev : 297.35 3.64 Card 00 Chip 03 Channel 46 Mean/Std_dev : 373.55 6.10 Card 00 Chip 03 Channel 47 Mean/Std_dev : 339.17 3.79 Card 00 Chip 03 Channel 48 Mean/Std_dev : 353.93 6.09 Card 00 Chip 03 Channel 49 Mean/Std_dev : 367.23 3.78 Card 00 Chip 03 Channel 50 Mean/Std_dev : 345.22 6.31 Card 00 Chip 03 Channel 51 Mean/Std_dev : 354.56 3.67 Card 00 Chip 03 Channel 52 Mean/Std_dev : 328.82 6.33 Card 00 Chip 03 Channel 53 Mean/Std_dev : 320.20 1.75 Card 00 Chip 03 Channel 54 Mean/Std_dev : 342.14 3.71 Card 00 Chip 03 Channel 55 Mean/Std_dev : 329.07 6.20 Card 00 Chip 03 Channel 56 Mean/Std_dev : 290.96 3.65 Card 00 Chip 03 Channel 57 Mean/Std_dev : 260.68 6.34 Card 00 Chip 03 Channel 58 Mean/Std_dev : 352.81 3.78 Card 00 Chip 03 Channel 59 Mean/Std_dev : 326.50 6.28 Card 00 Chip 03 Channel 60 Mean/Std_dev : 250.80 3.71 Card 00 Chip 03 Channel 61 Mean/Std_dev : 341.12 6.44 Card 00 Chip 03 Channel 62 Mean/Std_dev : 277.48 3.70 Card 00 Chip 03 Channel 63 Mean/Std_dev : 382.69 6.57 Card 00 Chip 03 Channel 64 Mean/Std_dev : 271.97 3.65 Card 00 Chip 03 Channel 65 Mean/Std_dev : 341.25 6.52 Card 00 Chip 03 Channel 66 Mean/Std_dev : 295.87 1.91 Card 00 Chip 03 Channel 67 Mean/Std_dev : 283.24 3.58 Card 00 Chip 03 Channel 68 Mean/Std_dev : 450.16 6.37 Card 00 Chip 03 Channel 69 Mean/Std_dev : 336.45 3.75 Card 00 Chip 03 Channel 70 Mean/Std_dev : 352.95 6.70 Card 00 Chip 03 Channel 71 Mean/Std_dev : 392.09 3.84 Card 00 Chip 03 Channel 72 Mean/Std_dev : 375.83 6.47 Card 00 Chip 03 Channel 73 Mean/Std_dev : 412.80 3.69 Card 00 Chip 03 Channel 74 Mean/Std_dev : 316.62 6.54 Card 00 Chip 03 Channel 75 Mean/Std_dev : 327.06 3.63 Card 00 Chip 03 Channel 76 Mean/Std_dev : 336.83 6.67 Card 00 Chip 03 Channel 77 Mean/Std_dev : 334.14 3.78 Card 00 Chip 03 Channel 78 Mean/Std_dev : 342.21 6.91 ----- End of Frame ----- srv(00).cmd(0): fe hped 4 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 04 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 04 Channel 01 Mean/Std_dev : 704.08 7.06 Card 00 Chip 04 Channel 02 Mean/Std_dev : 318.62 0.85 Card 00 Chip 04 Channel 03 Mean/Std_dev : 251.13 5.77 Card 00 Chip 04 Channel 04 Mean/Std_dev : 249.13 3.57 Card 00 Chip 04 Channel 05 Mean/Std_dev : 242.65 5.32 Card 00 Chip 04 Channel 06 Mean/Std_dev : 217.43 3.71 Card 00 Chip 04 Channel 07 Mean/Std_dev : 330.65 5.41 Card 00 Chip 04 Channel 08 Mean/Std_dev : 158.37 3.54 Card 00 Chip 04 Channel 09 Mean/Std_dev : 204.80 5.35 Card 00 Chip 04 Channel 10 Mean/Std_dev : 203.16 3.66 Card 00 Chip 04 Channel 11 Mean/Std_dev : 258.20 5.06 Card 00 Chip 04 Channel 12 Mean/Std_dev : 260.94 3.61 Card 00 Chip 04 Channel 13 Mean/Std_dev : 243.60 5.25 Card 00 Chip 04 Channel 14 Mean/Std_dev : 228.36 3.63 Card 00 Chip 04 Channel 15 Mean/Std_dev : 225.55 1.64 Card 00 Chip 04 Channel 16 Mean/Std_dev : 243.29 5.01 Card 00 Chip 04 Channel 17 Mean/Std_dev : 187.92 3.50 Card 00 Chip 04 Channel 18 Mean/Std_dev : 196.02 4.97 Card 00 Chip 04 Channel 19 Mean/Std_dev : 211.78 3.56 Card 00 Chip 04 Channel 20 Mean/Std_dev : 266.56 4.93 Card 00 Chip 04 Channel 21 Mean/Std_dev : 228.61 3.71 Card 00 Chip 04 Channel 22 Mean/Std_dev : 204.00 5.07 Card 00 Chip 04 Channel 23 Mean/Std_dev : 315.12 3.56 Card 00 Chip 04 Channel 24 Mean/Std_dev : 202.71 4.96 Card 00 Chip 04 Channel 25 Mean/Std_dev : 185.14 3.58 Card 00 Chip 04 Channel 26 Mean/Std_dev : 174.18 4.72 Card 00 Chip 04 Channel 27 Mean/Std_dev : 203.78 3.69 Card 00 Chip 04 Channel 28 Mean/Std_dev : 240.15 1.68 Card 00 Chip 04 Channel 29 Mean/Std_dev : 166.46 4.72 Card 00 Chip 04 Channel 30 Mean/Std_dev : 309.16 3.60 Card 00 Chip 04 Channel 31 Mean/Std_dev : 129.06 4.64 Card 00 Chip 04 Channel 32 Mean/Std_dev : 193.58 3.59 Card 00 Chip 04 Channel 33 Mean/Std_dev : 180.01 4.62 Card 00 Chip 04 Channel 34 Mean/Std_dev : 196.23 3.41 Card 00 Chip 04 Channel 35 Mean/Std_dev : 203.90 4.86 Card 00 Chip 04 Channel 36 Mean/Std_dev : 237.22 3.89 Card 00 Chip 04 Channel 37 Mean/Std_dev : 253.20 4.54 Card 00 Chip 04 Channel 38 Mean/Std_dev : 296.65 3.57 Card 00 Chip 04 Channel 39 Mean/Std_dev : 198.51 4.59 Card 00 Chip 04 Channel 40 Mean/Std_dev : 301.58 3.69 Card 00 Chip 04 Channel 41 Mean/Std_dev : 208.28 3.37 Card 00 Chip 04 Channel 42 Mean/Std_dev : 243.11 5.03 Card 00 Chip 04 Channel 43 Mean/Std_dev : 202.87 3.39 Card 00 Chip 04 Channel 44 Mean/Std_dev : 243.85 4.87 Card 00 Chip 04 Channel 45 Mean/Std_dev : 246.54 3.32 Card 00 Chip 04 Channel 46 Mean/Std_dev : 327.05 5.04 Card 00 Chip 04 Channel 47 Mean/Std_dev : 265.04 3.45 Card 00 Chip 04 Channel 48 Mean/Std_dev : 235.55 4.93 Card 00 Chip 04 Channel 49 Mean/Std_dev : 226.97 3.36 Card 00 Chip 04 Channel 50 Mean/Std_dev : 208.36 5.09 Card 00 Chip 04 Channel 51 Mean/Std_dev : 251.75 3.34 Card 00 Chip 04 Channel 52 Mean/Std_dev : 251.98 4.93 Card 00 Chip 04 Channel 53 Mean/Std_dev : 211.30 1.60 Card 00 Chip 04 Channel 54 Mean/Std_dev : 270.63 3.35 Card 00 Chip 04 Channel 55 Mean/Std_dev : 276.85 4.88 Card 00 Chip 04 Channel 56 Mean/Std_dev : 306.60 3.52 Card 00 Chip 04 Channel 57 Mean/Std_dev : 240.91 5.05 Card 00 Chip 04 Channel 58 Mean/Std_dev : 242.54 3.24 Card 00 Chip 04 Channel 59 Mean/Std_dev : 246.96 4.94 Card 00 Chip 04 Channel 60 Mean/Std_dev : 214.99 3.57 Card 00 Chip 04 Channel 61 Mean/Std_dev : 136.75 5.12 Card 00 Chip 04 Channel 62 Mean/Std_dev : 255.66 3.34 Card 00 Chip 04 Channel 63 Mean/Std_dev : 266.22 5.31 Card 00 Chip 04 Channel 64 Mean/Std_dev : 220.98 3.43 Card 00 Chip 04 Channel 65 Mean/Std_dev : 297.50 5.21 Card 00 Chip 04 Channel 66 Mean/Std_dev : 248.86 1.62 Card 00 Chip 04 Channel 67 Mean/Std_dev : 190.37 3.38 Card 00 Chip 04 Channel 68 Mean/Std_dev : 209.36 5.41 Card 00 Chip 04 Channel 69 Mean/Std_dev : 202.85 3.36 Card 00 Chip 04 Channel 70 Mean/Std_dev : 217.51 5.41 Card 00 Chip 04 Channel 71 Mean/Std_dev : 201.51 3.40 Card 00 Chip 04 Channel 72 Mean/Std_dev : 219.55 5.46 Card 00 Chip 04 Channel 73 Mean/Std_dev : 144.35 3.23 Card 00 Chip 04 Channel 74 Mean/Std_dev : 308.94 5.43 Card 00 Chip 04 Channel 75 Mean/Std_dev : 312.02 3.39 Card 00 Chip 04 Channel 76 Mean/Std_dev : 275.97 5.58 Card 00 Chip 04 Channel 77 Mean/Std_dev : 266.73 3.37 Card 00 Chip 04 Channel 78 Mean/Std_dev : 201.51 5.74 ----- End of Frame ----- srv(00).cmd(0): fe hped 5 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 05 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 05 Channel 01 Mean/Std_dev : 730.93 9.82 Card 00 Chip 05 Channel 02 Mean/Std_dev : 323.19 0.96 Card 00 Chip 05 Channel 03 Mean/Std_dev : 397.59 5.99 Card 00 Chip 05 Channel 04 Mean/Std_dev : 290.53 3.67 Card 00 Chip 05 Channel 05 Mean/Std_dev : 363.16 5.87 Card 00 Chip 05 Channel 06 Mean/Std_dev : 279.92 3.77 Card 00 Chip 05 Channel 07 Mean/Std_dev : 333.97 5.55 Card 00 Chip 05 Channel 08 Mean/Std_dev : 292.60 3.55 Card 00 Chip 05 Channel 09 Mean/Std_dev : 301.47 5.54 Card 00 Chip 05 Channel 10 Mean/Std_dev : 293.84 3.70 Card 00 Chip 05 Channel 11 Mean/Std_dev : 388.25 5.44 Card 00 Chip 05 Channel 12 Mean/Std_dev : 345.77 3.69 Card 00 Chip 05 Channel 13 Mean/Std_dev : 286.20 5.43 Card 00 Chip 05 Channel 14 Mean/Std_dev : 221.37 3.67 Card 00 Chip 05 Channel 15 Mean/Std_dev : 367.43 1.60 Card 00 Chip 05 Channel 16 Mean/Std_dev : 311.62 5.17 Card 00 Chip 05 Channel 17 Mean/Std_dev : 351.59 3.50 Card 00 Chip 05 Channel 18 Mean/Std_dev : 280.89 5.26 Card 00 Chip 05 Channel 19 Mean/Std_dev : 355.22 3.62 Card 00 Chip 05 Channel 20 Mean/Std_dev : 297.04 5.24 Card 00 Chip 05 Channel 21 Mean/Std_dev : 311.11 3.78 Card 00 Chip 05 Channel 22 Mean/Std_dev : 289.06 4.98 Card 00 Chip 05 Channel 23 Mean/Std_dev : 344.01 3.57 Card 00 Chip 05 Channel 24 Mean/Std_dev : 238.73 5.08 Card 00 Chip 05 Channel 25 Mean/Std_dev : 328.25 3.62 Card 00 Chip 05 Channel 26 Mean/Std_dev : 288.20 5.04 Card 00 Chip 05 Channel 27 Mean/Std_dev : 288.27 3.56 Card 00 Chip 05 Channel 28 Mean/Std_dev : 192.17 1.66 Card 00 Chip 05 Channel 29 Mean/Std_dev : 294.63 4.81 Card 00 Chip 05 Channel 30 Mean/Std_dev : 310.43 3.53 Card 00 Chip 05 Channel 31 Mean/Std_dev : 318.22 4.96 Card 00 Chip 05 Channel 32 Mean/Std_dev : 243.30 3.68 Card 00 Chip 05 Channel 33 Mean/Std_dev : 288.68 4.81 Card 00 Chip 05 Channel 34 Mean/Std_dev : 250.25 3.74 Card 00 Chip 05 Channel 35 Mean/Std_dev : 323.12 4.82 Card 00 Chip 05 Channel 36 Mean/Std_dev : 283.76 3.61 Card 00 Chip 05 Channel 37 Mean/Std_dev : 266.49 4.74 Card 00 Chip 05 Channel 38 Mean/Std_dev : 249.47 3.53 Card 00 Chip 05 Channel 39 Mean/Std_dev : 249.19 4.52 Card 00 Chip 05 Channel 40 Mean/Std_dev : 259.83 3.67 Card 00 Chip 05 Channel 41 Mean/Std_dev : 275.14 3.41 Card 00 Chip 05 Channel 42 Mean/Std_dev : 297.29 5.25 Card 00 Chip 05 Channel 43 Mean/Std_dev : 303.97 3.33 Card 00 Chip 05 Channel 44 Mean/Std_dev : 329.19 5.31 Card 00 Chip 05 Channel 45 Mean/Std_dev : 232.67 3.32 Card 00 Chip 05 Channel 46 Mean/Std_dev : 266.38 5.09 Card 00 Chip 05 Channel 47 Mean/Std_dev : 225.10 3.21 Card 00 Chip 05 Channel 48 Mean/Std_dev : 263.70 5.23 Card 00 Chip 05 Channel 49 Mean/Std_dev : 269.90 3.33 Card 00 Chip 05 Channel 50 Mean/Std_dev : 339.76 5.23 Card 00 Chip 05 Channel 51 Mean/Std_dev : 303.35 3.15 Card 00 Chip 05 Channel 52 Mean/Std_dev : 283.00 5.36 Card 00 Chip 05 Channel 53 Mean/Std_dev : 344.82 1.69 Card 00 Chip 05 Channel 54 Mean/Std_dev : 271.83 3.38 Card 00 Chip 05 Channel 55 Mean/Std_dev : 288.67 5.24 Card 00 Chip 05 Channel 56 Mean/Std_dev : 247.55 3.41 Card 00 Chip 05 Channel 57 Mean/Std_dev : 351.39 5.27 Card 00 Chip 05 Channel 58 Mean/Std_dev : 243.51 3.38 Card 00 Chip 05 Channel 59 Mean/Std_dev : 231.18 5.37 Card 00 Chip 05 Channel 60 Mean/Std_dev : 278.01 3.47 Card 00 Chip 05 Channel 61 Mean/Std_dev : 352.49 5.28 Card 00 Chip 05 Channel 62 Mean/Std_dev : 320.81 3.36 Card 00 Chip 05 Channel 63 Mean/Std_dev : 346.50 5.47 Card 00 Chip 05 Channel 64 Mean/Std_dev : 305.91 3.31 Card 00 Chip 05 Channel 65 Mean/Std_dev : 262.72 5.45 Card 00 Chip 05 Channel 66 Mean/Std_dev : 294.95 1.69 Card 00 Chip 05 Channel 67 Mean/Std_dev : 274.76 3.61 Card 00 Chip 05 Channel 68 Mean/Std_dev : 215.08 5.68 Card 00 Chip 05 Channel 69 Mean/Std_dev : 306.17 3.38 Card 00 Chip 05 Channel 70 Mean/Std_dev : 266.62 5.69 Card 00 Chip 05 Channel 71 Mean/Std_dev : 326.53 3.46 Card 00 Chip 05 Channel 72 Mean/Std_dev : 261.10 5.92 Card 00 Chip 05 Channel 73 Mean/Std_dev : 272.15 3.52 Card 00 Chip 05 Channel 74 Mean/Std_dev : 289.75 5.80 Card 00 Chip 05 Channel 75 Mean/Std_dev : 327.23 3.32 Card 00 Chip 05 Channel 76 Mean/Std_dev : 267.34 6.03 Card 00 Chip 05 Channel 77 Mean/Std_dev : 344.21 3.45 Card 00 Chip 05 Channel 78 Mean/Std_dev : 331.00 5.99 ----- End of Frame ----- srv(00).cmd(0): fe hped 6 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 06 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 06 Channel 01 Mean/Std_dev : 685.44 10.77 Card 00 Chip 06 Channel 02 Mean/Std_dev : 344.98 1.03 Card 00 Chip 06 Channel 03 Mean/Std_dev : 379.92 6.54 Card 00 Chip 06 Channel 04 Mean/Std_dev : 383.28 3.71 Card 00 Chip 06 Channel 05 Mean/Std_dev : 375.48 6.28 Card 00 Chip 06 Channel 06 Mean/Std_dev : 413.88 3.63 Card 00 Chip 06 Channel 07 Mean/Std_dev : 294.97 6.05 Card 00 Chip 06 Channel 08 Mean/Std_dev : 243.34 3.73 Card 00 Chip 06 Channel 09 Mean/Std_dev : 407.10 5.91 Card 00 Chip 06 Channel 10 Mean/Std_dev : 393.24 3.66 Card 00 Chip 06 Channel 11 Mean/Std_dev : 346.07 5.83 Card 00 Chip 06 Channel 12 Mean/Std_dev : 387.63 3.64 Card 00 Chip 06 Channel 13 Mean/Std_dev : 377.34 5.83 Card 00 Chip 06 Channel 14 Mean/Std_dev : 300.87 3.69 Card 00 Chip 06 Channel 15 Mean/Std_dev : 324.09 1.73 Card 00 Chip 06 Channel 16 Mean/Std_dev : 317.66 5.64 Card 00 Chip 06 Channel 17 Mean/Std_dev : 321.82 3.65 Card 00 Chip 06 Channel 18 Mean/Std_dev : 266.33 5.46 Card 00 Chip 06 Channel 19 Mean/Std_dev : 320.03 3.76 Card 00 Chip 06 Channel 20 Mean/Std_dev : 317.92 5.52 Card 00 Chip 06 Channel 21 Mean/Std_dev : 408.10 3.73 Card 00 Chip 06 Channel 22 Mean/Std_dev : 364.82 5.50 Card 00 Chip 06 Channel 23 Mean/Std_dev : 446.76 3.55 Card 00 Chip 06 Channel 24 Mean/Std_dev : 216.14 5.53 Card 00 Chip 06 Channel 25 Mean/Std_dev : 318.75 3.72 Card 00 Chip 06 Channel 26 Mean/Std_dev : 339.63 5.28 Card 00 Chip 06 Channel 27 Mean/Std_dev : 372.55 3.80 Card 00 Chip 06 Channel 28 Mean/Std_dev : 288.59 1.79 Card 00 Chip 06 Channel 29 Mean/Std_dev : 371.26 5.18 Card 00 Chip 06 Channel 30 Mean/Std_dev : 336.59 3.64 Card 00 Chip 06 Channel 31 Mean/Std_dev : 335.24 5.03 Card 00 Chip 06 Channel 32 Mean/Std_dev : 272.88 3.84 Card 00 Chip 06 Channel 33 Mean/Std_dev : 343.56 5.34 Card 00 Chip 06 Channel 34 Mean/Std_dev : 343.59 3.73 Card 00 Chip 06 Channel 35 Mean/Std_dev : 302.09 5.20 Card 00 Chip 06 Channel 36 Mean/Std_dev : 362.89 3.71 Card 00 Chip 06 Channel 37 Mean/Std_dev : 360.10 5.07 Card 00 Chip 06 Channel 38 Mean/Std_dev : 242.15 3.84 Card 00 Chip 06 Channel 39 Mean/Std_dev : 323.62 4.69 Card 00 Chip 06 Channel 40 Mean/Std_dev : 333.66 3.69 Card 00 Chip 06 Channel 41 Mean/Std_dev : 295.28 3.44 Card 00 Chip 06 Channel 42 Mean/Std_dev : 290.87 5.58 Card 00 Chip 06 Channel 43 Mean/Std_dev : 311.88 3.53 Card 00 Chip 06 Channel 44 Mean/Std_dev : 372.79 5.91 Card 00 Chip 06 Channel 45 Mean/Std_dev : 385.18 3.51 Card 00 Chip 06 Channel 46 Mean/Std_dev : 376.65 5.62 Card 00 Chip 06 Channel 47 Mean/Std_dev : 363.41 3.59 Card 00 Chip 06 Channel 48 Mean/Std_dev : 236.26 5.63 Card 00 Chip 06 Channel 49 Mean/Std_dev : 331.53 3.35 Card 00 Chip 06 Channel 50 Mean/Std_dev : 339.30 5.59 Card 00 Chip 06 Channel 51 Mean/Std_dev : 365.63 3.46 Card 00 Chip 06 Channel 52 Mean/Std_dev : 281.90 5.79 Card 00 Chip 06 Channel 53 Mean/Std_dev : 343.30 1.73 Card 00 Chip 06 Channel 54 Mean/Std_dev : 286.91 3.40 Card 00 Chip 06 Channel 55 Mean/Std_dev : 353.24 5.75 Card 00 Chip 06 Channel 56 Mean/Std_dev : 320.78 3.56 Card 00 Chip 06 Channel 57 Mean/Std_dev : 356.04 5.78 Card 00 Chip 06 Channel 58 Mean/Std_dev : 353.96 3.50 Card 00 Chip 06 Channel 59 Mean/Std_dev : 409.26 6.01 Card 00 Chip 06 Channel 60 Mean/Std_dev : 327.20 3.58 Card 00 Chip 06 Channel 61 Mean/Std_dev : 400.82 5.88 Card 00 Chip 06 Channel 62 Mean/Std_dev : 262.82 3.51 Card 00 Chip 06 Channel 63 Mean/Std_dev : 388.23 6.10 Card 00 Chip 06 Channel 64 Mean/Std_dev : 284.86 3.58 Card 00 Chip 06 Channel 65 Mean/Std_dev : 400.17 6.08 Card 00 Chip 06 Channel 66 Mean/Std_dev : 377.32 1.72 Card 00 Chip 06 Channel 67 Mean/Std_dev : 386.38 3.59 Card 00 Chip 06 Channel 68 Mean/Std_dev : 357.02 6.14 Card 00 Chip 06 Channel 69 Mean/Std_dev : 411.04 3.43 Card 00 Chip 06 Channel 70 Mean/Std_dev : 311.82 6.29 Card 00 Chip 06 Channel 71 Mean/Std_dev : 370.10 3.51 Card 00 Chip 06 Channel 72 Mean/Std_dev : 324.08 6.31 Card 00 Chip 06 Channel 73 Mean/Std_dev : 414.86 3.51 Card 00 Chip 06 Channel 74 Mean/Std_dev : 368.07 6.65 Card 00 Chip 06 Channel 75 Mean/Std_dev : 322.54 3.69 Card 00 Chip 06 Channel 76 Mean/Std_dev : 346.59 6.53 Card 00 Chip 06 Channel 77 Mean/Std_dev : 398.24 3.74 Card 00 Chip 06 Channel 78 Mean/Std_dev : 295.89 6.79 ----- End of Frame ----- srv(00).cmd(0): fe hped 7 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 07 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 07 Channel 01 Mean/Std_dev : 645.56 8.96 Card 00 Chip 07 Channel 02 Mean/Std_dev : 350.36 0.92 Card 00 Chip 07 Channel 03 Mean/Std_dev : 270.44 7.57 Card 00 Chip 07 Channel 04 Mean/Std_dev : 327.79 4.15 Card 00 Chip 07 Channel 05 Mean/Std_dev : 243.81 6.81 Card 00 Chip 07 Channel 06 Mean/Std_dev : 325.72 4.14 Card 00 Chip 07 Channel 07 Mean/Std_dev : 263.79 6.95 Card 00 Chip 07 Channel 08 Mean/Std_dev : 354.10 3.89 Card 00 Chip 07 Channel 09 Mean/Std_dev : 309.15 6.87 Card 00 Chip 07 Channel 10 Mean/Std_dev : 359.67 3.87 Card 00 Chip 07 Channel 11 Mean/Std_dev : 276.42 6.58 Card 00 Chip 07 Channel 12 Mean/Std_dev : 321.86 3.99 Card 00 Chip 07 Channel 13 Mean/Std_dev : 296.59 6.70 Card 00 Chip 07 Channel 14 Mean/Std_dev : 319.51 4.10 Card 00 Chip 07 Channel 15 Mean/Std_dev : 231.84 1.77 Card 00 Chip 07 Channel 16 Mean/Std_dev : 258.16 6.45 Card 00 Chip 07 Channel 17 Mean/Std_dev : 219.95 3.91 Card 00 Chip 07 Channel 18 Mean/Std_dev : 217.51 6.45 Card 00 Chip 07 Channel 19 Mean/Std_dev : 314.61 4.01 Card 00 Chip 07 Channel 20 Mean/Std_dev : 416.25 6.27 Card 00 Chip 07 Channel 21 Mean/Std_dev : 294.68 3.92 Card 00 Chip 07 Channel 22 Mean/Std_dev : 242.20 6.21 Card 00 Chip 07 Channel 23 Mean/Std_dev : 313.36 4.02 Card 00 Chip 07 Channel 24 Mean/Std_dev : 318.89 6.15 Card 00 Chip 07 Channel 25 Mean/Std_dev : 227.07 3.99 Card 00 Chip 07 Channel 26 Mean/Std_dev : 282.96 6.16 Card 00 Chip 07 Channel 27 Mean/Std_dev : 315.40 3.96 Card 00 Chip 07 Channel 28 Mean/Std_dev : 251.06 1.86 Card 00 Chip 07 Channel 29 Mean/Std_dev : 301.89 6.01 Card 00 Chip 07 Channel 30 Mean/Std_dev : 270.07 4.05 Card 00 Chip 07 Channel 31 Mean/Std_dev : 325.89 5.90 Card 00 Chip 07 Channel 32 Mean/Std_dev : 260.30 3.84 Card 00 Chip 07 Channel 33 Mean/Std_dev : 177.95 5.98 Card 00 Chip 07 Channel 34 Mean/Std_dev : 206.79 4.02 Card 00 Chip 07 Channel 35 Mean/Std_dev : 334.49 5.87 Card 00 Chip 07 Channel 36 Mean/Std_dev : 385.39 4.10 Card 00 Chip 07 Channel 37 Mean/Std_dev : 327.30 5.83 Card 00 Chip 07 Channel 38 Mean/Std_dev : 302.70 4.08 Card 00 Chip 07 Channel 39 Mean/Std_dev : 259.23 5.33 Card 00 Chip 07 Channel 40 Mean/Std_dev : 373.84 4.20 Card 00 Chip 07 Channel 41 Mean/Std_dev : 275.93 3.64 Card 00 Chip 07 Channel 42 Mean/Std_dev : 304.54 6.65 Card 00 Chip 07 Channel 43 Mean/Std_dev : 163.76 3.71 Card 00 Chip 07 Channel 44 Mean/Std_dev : 307.17 6.49 Card 00 Chip 07 Channel 45 Mean/Std_dev : 294.10 3.79 Card 00 Chip 07 Channel 46 Mean/Std_dev : 282.00 6.58 Card 00 Chip 07 Channel 47 Mean/Std_dev : 298.92 3.62 Card 00 Chip 07 Channel 48 Mean/Std_dev : 268.79 6.61 Card 00 Chip 07 Channel 49 Mean/Std_dev : 322.64 3.72 Card 00 Chip 07 Channel 50 Mean/Std_dev : 371.70 6.62 Card 00 Chip 07 Channel 51 Mean/Std_dev : 275.09 3.76 Card 00 Chip 07 Channel 52 Mean/Std_dev : 354.04 6.68 Card 00 Chip 07 Channel 53 Mean/Std_dev : 321.34 1.61 Card 00 Chip 07 Channel 54 Mean/Std_dev : 364.55 3.90 Card 00 Chip 07 Channel 55 Mean/Std_dev : 247.45 6.56 Card 00 Chip 07 Channel 56 Mean/Std_dev : 361.20 3.88 Card 00 Chip 07 Channel 57 Mean/Std_dev : 321.20 6.61 Card 00 Chip 07 Channel 58 Mean/Std_dev : 278.53 3.87 Card 00 Chip 07 Channel 59 Mean/Std_dev : 264.55 6.84 Card 00 Chip 07 Channel 60 Mean/Std_dev : 380.03 3.67 Card 00 Chip 07 Channel 61 Mean/Std_dev : 250.75 6.91 Card 00 Chip 07 Channel 62 Mean/Std_dev : 341.16 3.79 Card 00 Chip 07 Channel 63 Mean/Std_dev : 326.50 6.84 Card 00 Chip 07 Channel 64 Mean/Std_dev : 310.17 3.77 Card 00 Chip 07 Channel 65 Mean/Std_dev : 397.81 6.85 Card 00 Chip 07 Channel 66 Mean/Std_dev : 328.79 1.59 Card 00 Chip 07 Channel 67 Mean/Std_dev : 370.87 3.74 Card 00 Chip 07 Channel 68 Mean/Std_dev : 343.01 6.86 Card 00 Chip 07 Channel 69 Mean/Std_dev : 230.51 3.78 Card 00 Chip 07 Channel 70 Mean/Std_dev : 322.21 6.88 Card 00 Chip 07 Channel 71 Mean/Std_dev : 300.64 3.83 Card 00 Chip 07 Channel 72 Mean/Std_dev : 294.24 7.07 Card 00 Chip 07 Channel 73 Mean/Std_dev : 330.13 3.81 Card 00 Chip 07 Channel 74 Mean/Std_dev : 332.15 7.06 Card 00 Chip 07 Channel 75 Mean/Std_dev : 309.76 4.05 Card 00 Chip 07 Channel 76 Mean/Std_dev : 408.63 7.33 Card 00 Chip 07 Channel 77 Mean/Std_dev : 362.58 3.93 Card 00 Chip 07 Channel 78 Mean/Std_dev : 297.06 7.52 ----- End of Frame ----- srv(00).cmd(0): fe hped 0:15 * centermean 250 0 Tdcm(0) Fem(00): hped centermean done on 1264 histograms. Underflow: 8 Overflow: 0 ped: 250 srv(00).cmd(0): fe subtract_ped 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x4000 srv(00).cmd(0): fe zero_suppress 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe hped 0:15 * clr 0 Tdcm(0) Fem(00): hped clr done on 1264 histograms. Underflow: 0 Overflow: 0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): fe hped 0 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 00 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 00 Channel 01 Mean/Std_dev : 405.86 8.42 Card 00 Chip 00 Channel 02 Mean/Std_dev : 248.92 0.70 Card 00 Chip 00 Channel 03 Mean/Std_dev : 248.67 5.91 Card 00 Chip 00 Channel 04 Mean/Std_dev : 249.21 3.40 Card 00 Chip 00 Channel 05 Mean/Std_dev : 249.89 5.72 Card 00 Chip 00 Channel 06 Mean/Std_dev : 249.53 3.64 Card 00 Chip 00 Channel 07 Mean/Std_dev : 248.38 5.80 Card 00 Chip 00 Channel 08 Mean/Std_dev : 249.20 3.46 Card 00 Chip 00 Channel 09 Mean/Std_dev : 248.77 5.62 Card 00 Chip 00 Channel 10 Mean/Std_dev : 249.10 3.47 Card 00 Chip 00 Channel 11 Mean/Std_dev : 249.08 5.46 Card 00 Chip 00 Channel 12 Mean/Std_dev : 249.74 3.48 Card 00 Chip 00 Channel 13 Mean/Std_dev : 248.76 5.25 Card 00 Chip 00 Channel 14 Mean/Std_dev : 249.15 3.43 Card 00 Chip 00 Channel 15 Mean/Std_dev : 249.48 1.59 Card 00 Chip 00 Channel 16 Mean/Std_dev : 248.54 5.23 Card 00 Chip 00 Channel 17 Mean/Std_dev : 249.52 3.31 Card 00 Chip 00 Channel 18 Mean/Std_dev : 249.63 5.13 Card 00 Chip 00 Channel 19 Mean/Std_dev : 249.42 3.52 Card 00 Chip 00 Channel 20 Mean/Std_dev : 249.88 5.02 Card 00 Chip 00 Channel 21 Mean/Std_dev : 248.55 3.43 Card 00 Chip 00 Channel 22 Mean/Std_dev : 249.51 4.89 Card 00 Chip 00 Channel 23 Mean/Std_dev : 248.58 3.37 Card 00 Chip 00 Channel 24 Mean/Std_dev : 249.16 4.89 Card 00 Chip 00 Channel 25 Mean/Std_dev : 249.36 3.36 Card 00 Chip 00 Channel 26 Mean/Std_dev : 249.16 4.82 Card 00 Chip 00 Channel 27 Mean/Std_dev : 249.04 3.36 Card 00 Chip 00 Channel 28 Mean/Std_dev : 249.57 1.70 Card 00 Chip 00 Channel 29 Mean/Std_dev : 248.76 4.76 Card 00 Chip 00 Channel 30 Mean/Std_dev : 249.77 3.45 Card 00 Chip 00 Channel 31 Mean/Std_dev : 249.43 4.69 Card 00 Chip 00 Channel 32 Mean/Std_dev : 249.29 3.33 Card 00 Chip 00 Channel 33 Mean/Std_dev : 248.94 4.61 Card 00 Chip 00 Channel 34 Mean/Std_dev : 249.63 3.36 Card 00 Chip 00 Channel 35 Mean/Std_dev : 249.15 4.60 Card 00 Chip 00 Channel 36 Mean/Std_dev : 249.06 3.28 Card 00 Chip 00 Channel 37 Mean/Std_dev : 249.09 4.54 Card 00 Chip 00 Channel 38 Mean/Std_dev : 249.62 3.49 Card 00 Chip 00 Channel 39 Mean/Std_dev : 249.01 4.20 Card 00 Chip 00 Channel 40 Mean/Std_dev : 249.93 3.59 Card 00 Chip 00 Channel 41 Mean/Std_dev : 249.92 3.29 Card 00 Chip 00 Channel 42 Mean/Std_dev : 248.91 4.56 Card 00 Chip 00 Channel 43 Mean/Std_dev : 249.18 3.40 Card 00 Chip 00 Channel 44 Mean/Std_dev : 249.09 4.68 Card 00 Chip 00 Channel 45 Mean/Std_dev : 249.64 3.39 Card 00 Chip 00 Channel 46 Mean/Std_dev : 249.90 4.54 Card 00 Chip 00 Channel 47 Mean/Std_dev : 249.39 3.13 Card 00 Chip 00 Channel 48 Mean/Std_dev : 248.33 4.69 Card 00 Chip 00 Channel 49 Mean/Std_dev : 248.52 3.29 Card 00 Chip 00 Channel 50 Mean/Std_dev : 249.28 4.82 Card 00 Chip 00 Channel 51 Mean/Std_dev : 249.86 3.08 Card 00 Chip 00 Channel 52 Mean/Std_dev : 248.31 4.87 Card 00 Chip 00 Channel 53 Mean/Std_dev : 249.39 1.52 Card 00 Chip 00 Channel 54 Mean/Std_dev : 249.72 3.20 Card 00 Chip 00 Channel 55 Mean/Std_dev : 249.33 4.62 Card 00 Chip 00 Channel 56 Mean/Std_dev : 249.56 3.13 Card 00 Chip 00 Channel 57 Mean/Std_dev : 248.22 4.72 Card 00 Chip 00 Channel 58 Mean/Std_dev : 250.05 3.20 Card 00 Chip 00 Channel 59 Mean/Std_dev : 249.26 4.83 Card 00 Chip 00 Channel 60 Mean/Std_dev : 249.32 3.24 Card 00 Chip 00 Channel 61 Mean/Std_dev : 249.36 4.78 Card 00 Chip 00 Channel 62 Mean/Std_dev : 249.67 3.23 Card 00 Chip 00 Channel 63 Mean/Std_dev : 250.63 4.98 Card 00 Chip 00 Channel 64 Mean/Std_dev : 249.25 3.15 Card 00 Chip 00 Channel 65 Mean/Std_dev : 248.64 4.97 Card 00 Chip 00 Channel 66 Mean/Std_dev : 249.19 1.54 Card 00 Chip 00 Channel 67 Mean/Std_dev : 249.25 3.37 Card 00 Chip 00 Channel 68 Mean/Std_dev : 249.12 4.95 Card 00 Chip 00 Channel 69 Mean/Std_dev : 248.94 3.17 Card 00 Chip 00 Channel 70 Mean/Std_dev : 248.78 5.14 Card 00 Chip 00 Channel 71 Mean/Std_dev : 248.75 3.21 Card 00 Chip 00 Channel 72 Mean/Std_dev : 250.00 5.15 Card 00 Chip 00 Channel 73 Mean/Std_dev : 249.61 3.28 Card 00 Chip 00 Channel 74 Mean/Std_dev : 248.69 5.22 Card 00 Chip 00 Channel 75 Mean/Std_dev : 248.48 3.17 Card 00 Chip 00 Channel 76 Mean/Std_dev : 249.25 5.41 Card 00 Chip 00 Channel 77 Mean/Std_dev : 249.02 3.21 Card 00 Chip 00 Channel 78 Mean/Std_dev : 248.78 5.34 ----- End of Frame ----- srv(00).cmd(0): fe hped 1 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 01 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 01 Channel 01 Mean/Std_dev : 394.98 9.20 Card 00 Chip 01 Channel 02 Mean/Std_dev : 248.58 0.69 Card 00 Chip 01 Channel 03 Mean/Std_dev : 248.80 6.10 Card 00 Chip 01 Channel 04 Mean/Std_dev : 248.87 3.54 Card 00 Chip 01 Channel 05 Mean/Std_dev : 249.58 6.25 Card 00 Chip 01 Channel 06 Mean/Std_dev : 249.60 3.47 Card 00 Chip 01 Channel 07 Mean/Std_dev : 249.92 5.88 Card 00 Chip 01 Channel 08 Mean/Std_dev : 249.28 3.41 Card 00 Chip 01 Channel 09 Mean/Std_dev : 249.01 5.75 Card 00 Chip 01 Channel 10 Mean/Std_dev : 249.87 3.32 Card 00 Chip 01 Channel 11 Mean/Std_dev : 249.41 5.38 Card 00 Chip 01 Channel 12 Mean/Std_dev : 249.44 3.56 Card 00 Chip 01 Channel 13 Mean/Std_dev : 248.40 5.40 Card 00 Chip 01 Channel 14 Mean/Std_dev : 248.61 3.41 Card 00 Chip 01 Channel 15 Mean/Std_dev : 249.15 1.65 Card 00 Chip 01 Channel 16 Mean/Std_dev : 248.78 5.36 Card 00 Chip 01 Channel 17 Mean/Std_dev : 249.91 3.56 Card 00 Chip 01 Channel 18 Mean/Std_dev : 248.19 5.27 Card 00 Chip 01 Channel 19 Mean/Std_dev : 249.41 3.48 Card 00 Chip 01 Channel 20 Mean/Std_dev : 249.19 5.28 Card 00 Chip 01 Channel 21 Mean/Std_dev : 249.51 3.53 Card 00 Chip 01 Channel 22 Mean/Std_dev : 249.79 5.29 Card 00 Chip 01 Channel 23 Mean/Std_dev : 249.25 3.40 Card 00 Chip 01 Channel 24 Mean/Std_dev : 248.77 5.23 Card 00 Chip 01 Channel 25 Mean/Std_dev : 249.18 3.41 Card 00 Chip 01 Channel 26 Mean/Std_dev : 248.99 5.00 Card 00 Chip 01 Channel 27 Mean/Std_dev : 249.43 3.45 Card 00 Chip 01 Channel 28 Mean/Std_dev : 250.05 1.75 Card 00 Chip 01 Channel 29 Mean/Std_dev : 249.77 5.01 Card 00 Chip 01 Channel 30 Mean/Std_dev : 249.36 3.38 Card 00 Chip 01 Channel 31 Mean/Std_dev : 249.38 4.87 Card 00 Chip 01 Channel 32 Mean/Std_dev : 249.13 3.67 Card 00 Chip 01 Channel 33 Mean/Std_dev : 248.28 4.71 Card 00 Chip 01 Channel 34 Mean/Std_dev : 248.62 3.50 Card 00 Chip 01 Channel 35 Mean/Std_dev : 249.81 4.87 Card 00 Chip 01 Channel 36 Mean/Std_dev : 249.44 3.61 Card 00 Chip 01 Channel 37 Mean/Std_dev : 249.90 4.65 Card 00 Chip 01 Channel 38 Mean/Std_dev : 249.20 3.55 Card 00 Chip 01 Channel 39 Mean/Std_dev : 249.81 4.26 Card 00 Chip 01 Channel 40 Mean/Std_dev : 249.06 3.38 Card 00 Chip 01 Channel 41 Mean/Std_dev : 249.89 3.40 Card 00 Chip 01 Channel 42 Mean/Std_dev : 249.36 4.90 Card 00 Chip 01 Channel 43 Mean/Std_dev : 249.36 3.10 Card 00 Chip 01 Channel 44 Mean/Std_dev : 250.20 4.86 Card 00 Chip 01 Channel 45 Mean/Std_dev : 249.32 3.25 Card 00 Chip 01 Channel 46 Mean/Std_dev : 248.72 4.95 Card 00 Chip 01 Channel 47 Mean/Std_dev : 249.49 3.34 Card 00 Chip 01 Channel 48 Mean/Std_dev : 249.07 5.01 Card 00 Chip 01 Channel 49 Mean/Std_dev : 249.57 3.35 Card 00 Chip 01 Channel 50 Mean/Std_dev : 249.42 4.96 Card 00 Chip 01 Channel 51 Mean/Std_dev : 249.49 3.23 Card 00 Chip 01 Channel 52 Mean/Std_dev : 249.34 5.09 Card 00 Chip 01 Channel 53 Mean/Std_dev : 249.62 1.46 Card 00 Chip 01 Channel 54 Mean/Std_dev : 248.89 3.37 Card 00 Chip 01 Channel 55 Mean/Std_dev : 249.42 5.23 Card 00 Chip 01 Channel 56 Mean/Std_dev : 248.48 3.16 Card 00 Chip 01 Channel 57 Mean/Std_dev : 249.07 5.09 Card 00 Chip 01 Channel 58 Mean/Std_dev : 248.65 3.27 Card 00 Chip 01 Channel 59 Mean/Std_dev : 249.29 5.12 Card 00 Chip 01 Channel 60 Mean/Std_dev : 248.61 3.48 Card 00 Chip 01 Channel 61 Mean/Std_dev : 249.13 5.13 Card 00 Chip 01 Channel 62 Mean/Std_dev : 249.58 3.34 Card 00 Chip 01 Channel 63 Mean/Std_dev : 249.13 5.30 Card 00 Chip 01 Channel 64 Mean/Std_dev : 248.74 3.37 Card 00 Chip 01 Channel 65 Mean/Std_dev : 249.46 5.24 Card 00 Chip 01 Channel 66 Mean/Std_dev : 249.18 1.54 Card 00 Chip 01 Channel 67 Mean/Std_dev : 248.99 3.23 Card 00 Chip 01 Channel 68 Mean/Std_dev : 249.43 5.22 Card 00 Chip 01 Channel 69 Mean/Std_dev : 249.28 3.32 Card 00 Chip 01 Channel 70 Mean/Std_dev : 248.72 5.30 Card 00 Chip 01 Channel 71 Mean/Std_dev : 249.39 3.17 Card 00 Chip 01 Channel 72 Mean/Std_dev : 250.48 5.36 Card 00 Chip 01 Channel 73 Mean/Std_dev : 250.17 3.38 Card 00 Chip 01 Channel 74 Mean/Std_dev : 248.70 5.47 Card 00 Chip 01 Channel 75 Mean/Std_dev : 248.61 3.25 Card 00 Chip 01 Channel 76 Mean/Std_dev : 249.12 5.55 Card 00 Chip 01 Channel 77 Mean/Std_dev : 249.65 3.21 Card 00 Chip 01 Channel 78 Mean/Std_dev : 249.28 5.45 ----- End of Frame ----- srv(00).cmd(0): fe hped 2 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 02 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 02 Channel 01 Mean/Std_dev : 607.77 8.16 Card 00 Chip 02 Channel 02 Mean/Std_dev : 248.97 0.71 Card 00 Chip 02 Channel 03 Mean/Std_dev : 248.79 6.90 Card 00 Chip 02 Channel 04 Mean/Std_dev : 249.22 3.68 Card 00 Chip 02 Channel 05 Mean/Std_dev : 248.15 6.57 Card 00 Chip 02 Channel 06 Mean/Std_dev : 248.72 3.48 Card 00 Chip 02 Channel 07 Mean/Std_dev : 248.79 6.47 Card 00 Chip 02 Channel 08 Mean/Std_dev : 248.29 3.48 Card 00 Chip 02 Channel 09 Mean/Std_dev : 248.23 6.20 Card 00 Chip 02 Channel 10 Mean/Std_dev : 249.13 3.49 Card 00 Chip 02 Channel 11 Mean/Std_dev : 249.23 6.03 Card 00 Chip 02 Channel 12 Mean/Std_dev : 249.66 3.50 Card 00 Chip 02 Channel 13 Mean/Std_dev : 248.58 6.09 Card 00 Chip 02 Channel 14 Mean/Std_dev : 249.37 3.51 Card 00 Chip 02 Channel 15 Mean/Std_dev : 249.14 1.61 Card 00 Chip 02 Channel 16 Mean/Std_dev : 249.20 5.82 Card 00 Chip 02 Channel 17 Mean/Std_dev : 248.71 3.45 Card 00 Chip 02 Channel 18 Mean/Std_dev : 248.56 5.78 Card 00 Chip 02 Channel 19 Mean/Std_dev : 249.70 3.49 Card 00 Chip 02 Channel 20 Mean/Std_dev : 249.39 5.67 Card 00 Chip 02 Channel 21 Mean/Std_dev : 249.19 3.37 Card 00 Chip 02 Channel 22 Mean/Std_dev : 249.17 5.63 Card 00 Chip 02 Channel 23 Mean/Std_dev : 248.85 3.38 Card 00 Chip 02 Channel 24 Mean/Std_dev : 248.61 5.45 Card 00 Chip 02 Channel 25 Mean/Std_dev : 248.63 3.41 Card 00 Chip 02 Channel 26 Mean/Std_dev : 248.41 5.40 Card 00 Chip 02 Channel 27 Mean/Std_dev : 248.38 3.51 Card 00 Chip 02 Channel 28 Mean/Std_dev : 249.56 1.61 Card 00 Chip 02 Channel 29 Mean/Std_dev : 249.00 5.33 Card 00 Chip 02 Channel 30 Mean/Std_dev : 249.05 3.41 Card 00 Chip 02 Channel 31 Mean/Std_dev : 248.91 5.29 Card 00 Chip 02 Channel 32 Mean/Std_dev : 249.34 3.38 Card 00 Chip 02 Channel 33 Mean/Std_dev : 249.54 5.11 Card 00 Chip 02 Channel 34 Mean/Std_dev : 249.06 3.49 Card 00 Chip 02 Channel 35 Mean/Std_dev : 249.66 5.00 Card 00 Chip 02 Channel 36 Mean/Std_dev : 249.27 3.36 Card 00 Chip 02 Channel 37 Mean/Std_dev : 249.25 4.89 Card 00 Chip 02 Channel 38 Mean/Std_dev : 249.34 3.43 Card 00 Chip 02 Channel 39 Mean/Std_dev : 249.03 4.36 Card 00 Chip 02 Channel 40 Mean/Std_dev : 249.46 3.47 Card 00 Chip 02 Channel 41 Mean/Std_dev : 248.31 3.26 Card 00 Chip 02 Channel 42 Mean/Std_dev : 249.19 5.11 Card 00 Chip 02 Channel 43 Mean/Std_dev : 248.97 3.26 Card 00 Chip 02 Channel 44 Mean/Std_dev : 248.43 5.14 Card 00 Chip 02 Channel 45 Mean/Std_dev : 248.46 3.45 Card 00 Chip 02 Channel 46 Mean/Std_dev : 248.82 5.28 Card 00 Chip 02 Channel 47 Mean/Std_dev : 248.40 3.30 Card 00 Chip 02 Channel 48 Mean/Std_dev : 248.03 5.30 Card 00 Chip 02 Channel 49 Mean/Std_dev : 249.11 3.17 Card 00 Chip 02 Channel 50 Mean/Std_dev : 248.33 5.32 Card 00 Chip 02 Channel 51 Mean/Std_dev : 248.54 3.35 Card 00 Chip 02 Channel 52 Mean/Std_dev : 249.40 5.35 Card 00 Chip 02 Channel 53 Mean/Std_dev : 249.33 1.49 Card 00 Chip 02 Channel 54 Mean/Std_dev : 248.95 3.33 Card 00 Chip 02 Channel 55 Mean/Std_dev : 248.51 5.25 Card 00 Chip 02 Channel 56 Mean/Std_dev : 248.36 3.29 Card 00 Chip 02 Channel 57 Mean/Std_dev : 248.89 5.49 Card 00 Chip 02 Channel 58 Mean/Std_dev : 249.15 3.32 Card 00 Chip 02 Channel 59 Mean/Std_dev : 248.99 5.52 Card 00 Chip 02 Channel 60 Mean/Std_dev : 248.45 3.35 Card 00 Chip 02 Channel 61 Mean/Std_dev : 248.70 5.59 Card 00 Chip 02 Channel 62 Mean/Std_dev : 249.06 3.33 Card 00 Chip 02 Channel 63 Mean/Std_dev : 248.41 5.49 Card 00 Chip 02 Channel 64 Mean/Std_dev : 248.35 3.35 Card 00 Chip 02 Channel 65 Mean/Std_dev : 248.79 5.66 Card 00 Chip 02 Channel 66 Mean/Std_dev : 249.48 1.51 Card 00 Chip 02 Channel 67 Mean/Std_dev : 249.53 3.36 Card 00 Chip 02 Channel 68 Mean/Std_dev : 249.25 5.42 Card 00 Chip 02 Channel 69 Mean/Std_dev : 249.02 3.25 Card 00 Chip 02 Channel 70 Mean/Std_dev : 249.36 5.68 Card 00 Chip 02 Channel 71 Mean/Std_dev : 248.62 3.39 Card 00 Chip 02 Channel 72 Mean/Std_dev : 248.64 5.57 Card 00 Chip 02 Channel 73 Mean/Std_dev : 248.88 3.23 Card 00 Chip 02 Channel 74 Mean/Std_dev : 248.36 5.77 Card 00 Chip 02 Channel 75 Mean/Std_dev : 248.44 3.34 Card 00 Chip 02 Channel 76 Mean/Std_dev : 248.40 5.85 Card 00 Chip 02 Channel 77 Mean/Std_dev : 248.37 3.42 Card 00 Chip 02 Channel 78 Mean/Std_dev : 249.98 5.78 ----- End of Frame ----- srv(00).cmd(0): fe hped 3 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 03 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 03 Channel 01 Mean/Std_dev : 486.69 8.78 Card 00 Chip 03 Channel 02 Mean/Std_dev : 248.61 0.69 Card 00 Chip 03 Channel 03 Mean/Std_dev : 249.10 8.29 Card 00 Chip 03 Channel 04 Mean/Std_dev : 248.75 3.87 Card 00 Chip 03 Channel 05 Mean/Std_dev : 249.30 8.06 Card 00 Chip 03 Channel 06 Mean/Std_dev : 248.69 3.88 Card 00 Chip 03 Channel 07 Mean/Std_dev : 249.39 7.79 Card 00 Chip 03 Channel 08 Mean/Std_dev : 248.21 3.78 Card 00 Chip 03 Channel 09 Mean/Std_dev : 248.38 7.26 Card 00 Chip 03 Channel 10 Mean/Std_dev : 249.88 3.65 Card 00 Chip 03 Channel 11 Mean/Std_dev : 249.13 6.94 Card 00 Chip 03 Channel 12 Mean/Std_dev : 249.08 3.78 Card 00 Chip 03 Channel 13 Mean/Std_dev : 248.52 6.95 Card 00 Chip 03 Channel 14 Mean/Std_dev : 249.18 3.65 Card 00 Chip 03 Channel 15 Mean/Std_dev : 249.01 1.62 Card 00 Chip 03 Channel 16 Mean/Std_dev : 249.80 7.01 Card 00 Chip 03 Channel 17 Mean/Std_dev : 248.62 3.71 Card 00 Chip 03 Channel 18 Mean/Std_dev : 249.98 6.85 Card 00 Chip 03 Channel 19 Mean/Std_dev : 249.20 3.70 Card 00 Chip 03 Channel 20 Mean/Std_dev : 248.83 6.67 Card 00 Chip 03 Channel 21 Mean/Std_dev : 248.70 3.66 Card 00 Chip 03 Channel 22 Mean/Std_dev : 248.31 6.46 Card 00 Chip 03 Channel 23 Mean/Std_dev : 249.01 3.69 Card 00 Chip 03 Channel 24 Mean/Std_dev : 248.98 6.39 Card 00 Chip 03 Channel 25 Mean/Std_dev : 248.45 3.69 Card 00 Chip 03 Channel 26 Mean/Std_dev : 249.16 6.38 Card 00 Chip 03 Channel 27 Mean/Std_dev : 248.40 3.68 Card 00 Chip 03 Channel 28 Mean/Std_dev : 249.12 1.68 Card 00 Chip 03 Channel 29 Mean/Std_dev : 249.02 6.17 Card 00 Chip 03 Channel 30 Mean/Std_dev : 248.74 3.73 Card 00 Chip 03 Channel 31 Mean/Std_dev : 249.23 6.13 Card 00 Chip 03 Channel 32 Mean/Std_dev : 249.16 3.65 Card 00 Chip 03 Channel 33 Mean/Std_dev : 249.43 5.90 Card 00 Chip 03 Channel 34 Mean/Std_dev : 248.27 3.60 Card 00 Chip 03 Channel 35 Mean/Std_dev : 248.74 5.76 Card 00 Chip 03 Channel 36 Mean/Std_dev : 248.83 3.66 Card 00 Chip 03 Channel 37 Mean/Std_dev : 249.74 5.63 Card 00 Chip 03 Channel 38 Mean/Std_dev : 248.46 3.66 Card 00 Chip 03 Channel 39 Mean/Std_dev : 248.86 4.96 Card 00 Chip 03 Channel 40 Mean/Std_dev : 249.25 3.95 Card 00 Chip 03 Channel 41 Mean/Std_dev : 248.48 3.80 Card 00 Chip 03 Channel 42 Mean/Std_dev : 248.74 6.18 Card 00 Chip 03 Channel 43 Mean/Std_dev : 248.87 3.77 Card 00 Chip 03 Channel 44 Mean/Std_dev : 248.79 6.16 Card 00 Chip 03 Channel 45 Mean/Std_dev : 249.17 3.63 Card 00 Chip 03 Channel 46 Mean/Std_dev : 248.03 6.17 Card 00 Chip 03 Channel 47 Mean/Std_dev : 249.13 3.61 Card 00 Chip 03 Channel 48 Mean/Std_dev : 248.24 6.16 Card 00 Chip 03 Channel 49 Mean/Std_dev : 249.15 3.61 Card 00 Chip 03 Channel 50 Mean/Std_dev : 248.79 6.24 Card 00 Chip 03 Channel 51 Mean/Std_dev : 248.51 3.53 Card 00 Chip 03 Channel 52 Mean/Std_dev : 249.16 6.36 Card 00 Chip 03 Channel 53 Mean/Std_dev : 248.98 1.53 Card 00 Chip 03 Channel 54 Mean/Std_dev : 249.15 3.56 Card 00 Chip 03 Channel 55 Mean/Std_dev : 249.23 6.23 Card 00 Chip 03 Channel 56 Mean/Std_dev : 249.04 3.50 Card 00 Chip 03 Channel 57 Mean/Std_dev : 248.95 6.27 Card 00 Chip 03 Channel 58 Mean/Std_dev : 249.06 3.59 Card 00 Chip 03 Channel 59 Mean/Std_dev : 248.23 6.29 Card 00 Chip 03 Channel 60 Mean/Std_dev : 247.52 3.58 Card 00 Chip 03 Channel 61 Mean/Std_dev : 248.82 6.36 Card 00 Chip 03 Channel 62 Mean/Std_dev : 249.20 3.52 Card 00 Chip 03 Channel 63 Mean/Std_dev : 248.73 6.49 Card 00 Chip 03 Channel 64 Mean/Std_dev : 248.79 3.67 Card 00 Chip 03 Channel 65 Mean/Std_dev : 248.29 6.56 Card 00 Chip 03 Channel 66 Mean/Std_dev : 248.75 1.48 Card 00 Chip 03 Channel 67 Mean/Std_dev : 249.32 3.64 Card 00 Chip 03 Channel 68 Mean/Std_dev : 248.97 6.41 Card 00 Chip 03 Channel 69 Mean/Std_dev : 249.50 3.55 Card 00 Chip 03 Channel 70 Mean/Std_dev : 248.47 6.48 Card 00 Chip 03 Channel 71 Mean/Std_dev : 248.46 3.63 Card 00 Chip 03 Channel 72 Mean/Std_dev : 248.31 6.62 Card 00 Chip 03 Channel 73 Mean/Std_dev : 249.01 3.63 Card 00 Chip 03 Channel 74 Mean/Std_dev : 248.23 6.65 Card 00 Chip 03 Channel 75 Mean/Std_dev : 249.06 3.61 Card 00 Chip 03 Channel 76 Mean/Std_dev : 248.17 6.58 Card 00 Chip 03 Channel 77 Mean/Std_dev : 248.82 3.72 Card 00 Chip 03 Channel 78 Mean/Std_dev : 248.55 6.82 ----- End of Frame ----- srv(00).cmd(0): fe hped 4 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 04 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 04 Channel 01 Mean/Std_dev : 447.40 6.97 Card 00 Chip 04 Channel 02 Mean/Std_dev : 248.95 0.68 Card 00 Chip 04 Channel 03 Mean/Std_dev : 249.71 5.83 Card 00 Chip 04 Channel 04 Mean/Std_dev : 249.35 3.62 Card 00 Chip 04 Channel 05 Mean/Std_dev : 249.55 5.50 Card 00 Chip 04 Channel 06 Mean/Std_dev : 249.66 3.67 Card 00 Chip 04 Channel 07 Mean/Std_dev : 249.90 5.45 Card 00 Chip 04 Channel 08 Mean/Std_dev : 250.13 3.71 Card 00 Chip 04 Channel 09 Mean/Std_dev : 248.65 5.42 Card 00 Chip 04 Channel 10 Mean/Std_dev : 249.23 3.77 Card 00 Chip 04 Channel 11 Mean/Std_dev : 249.19 5.19 Card 00 Chip 04 Channel 12 Mean/Std_dev : 249.57 3.66 Card 00 Chip 04 Channel 13 Mean/Std_dev : 248.30 5.18 Card 00 Chip 04 Channel 14 Mean/Std_dev : 249.25 3.74 Card 00 Chip 04 Channel 15 Mean/Std_dev : 249.18 1.65 Card 00 Chip 04 Channel 16 Mean/Std_dev : 249.98 5.11 Card 00 Chip 04 Channel 17 Mean/Std_dev : 249.35 3.52 Card 00 Chip 04 Channel 18 Mean/Std_dev : 249.73 5.02 Card 00 Chip 04 Channel 19 Mean/Std_dev : 248.72 3.53 Card 00 Chip 04 Channel 20 Mean/Std_dev : 248.81 5.10 Card 00 Chip 04 Channel 21 Mean/Std_dev : 249.15 3.64 Card 00 Chip 04 Channel 22 Mean/Std_dev : 249.65 5.03 Card 00 Chip 04 Channel 23 Mean/Std_dev : 249.31 3.61 Card 00 Chip 04 Channel 24 Mean/Std_dev : 249.64 4.97 Card 00 Chip 04 Channel 25 Mean/Std_dev : 249.51 3.54 Card 00 Chip 04 Channel 26 Mean/Std_dev : 249.56 4.96 Card 00 Chip 04 Channel 27 Mean/Std_dev : 249.28 3.53 Card 00 Chip 04 Channel 28 Mean/Std_dev : 249.63 1.69 Card 00 Chip 04 Channel 29 Mean/Std_dev : 250.22 4.89 Card 00 Chip 04 Channel 30 Mean/Std_dev : 250.04 3.42 Card 00 Chip 04 Channel 31 Mean/Std_dev : 249.57 4.69 Card 00 Chip 04 Channel 32 Mean/Std_dev : 248.72 3.53 Card 00 Chip 04 Channel 33 Mean/Std_dev : 250.04 4.81 Card 00 Chip 04 Channel 34 Mean/Std_dev : 249.60 3.42 Card 00 Chip 04 Channel 35 Mean/Std_dev : 249.39 4.82 Card 00 Chip 04 Channel 36 Mean/Std_dev : 249.78 3.67 Card 00 Chip 04 Channel 37 Mean/Std_dev : 249.88 4.74 Card 00 Chip 04 Channel 38 Mean/Std_dev : 249.09 3.52 Card 00 Chip 04 Channel 39 Mean/Std_dev : 249.08 4.37 Card 00 Chip 04 Channel 40 Mean/Std_dev : 249.34 3.71 Card 00 Chip 04 Channel 41 Mean/Std_dev : 250.14 3.36 Card 00 Chip 04 Channel 42 Mean/Std_dev : 249.29 5.07 Card 00 Chip 04 Channel 43 Mean/Std_dev : 248.79 3.25 Card 00 Chip 04 Channel 44 Mean/Std_dev : 248.98 4.86 Card 00 Chip 04 Channel 45 Mean/Std_dev : 248.67 3.34 Card 00 Chip 04 Channel 46 Mean/Std_dev : 248.45 5.06 Card 00 Chip 04 Channel 47 Mean/Std_dev : 249.87 3.38 Card 00 Chip 04 Channel 48 Mean/Std_dev : 248.42 5.17 Card 00 Chip 04 Channel 49 Mean/Std_dev : 249.26 3.34 Card 00 Chip 04 Channel 50 Mean/Std_dev : 249.84 4.96 Card 00 Chip 04 Channel 51 Mean/Std_dev : 249.29 3.40 Card 00 Chip 04 Channel 52 Mean/Std_dev : 248.60 5.08 Card 00 Chip 04 Channel 53 Mean/Std_dev : 249.92 1.58 Card 00 Chip 04 Channel 54 Mean/Std_dev : 248.99 3.34 Card 00 Chip 04 Channel 55 Mean/Std_dev : 249.51 4.96 Card 00 Chip 04 Channel 56 Mean/Std_dev : 249.15 3.29 Card 00 Chip 04 Channel 57 Mean/Std_dev : 248.98 5.08 Card 00 Chip 04 Channel 58 Mean/Std_dev : 248.61 3.20 Card 00 Chip 04 Channel 59 Mean/Std_dev : 249.77 5.09 Card 00 Chip 04 Channel 60 Mean/Std_dev : 249.45 3.40 Card 00 Chip 04 Channel 61 Mean/Std_dev : 249.37 5.14 Card 00 Chip 04 Channel 62 Mean/Std_dev : 249.05 3.30 Card 00 Chip 04 Channel 63 Mean/Std_dev : 249.80 5.44 Card 00 Chip 04 Channel 64 Mean/Std_dev : 249.53 3.25 Card 00 Chip 04 Channel 65 Mean/Std_dev : 249.00 5.23 Card 00 Chip 04 Channel 66 Mean/Std_dev : 249.20 1.54 Card 00 Chip 04 Channel 67 Mean/Std_dev : 250.03 3.31 Card 00 Chip 04 Channel 68 Mean/Std_dev : 249.48 5.41 Card 00 Chip 04 Channel 69 Mean/Std_dev : 249.90 3.43 Card 00 Chip 04 Channel 70 Mean/Std_dev : 247.80 5.29 Card 00 Chip 04 Channel 71 Mean/Std_dev : 249.16 3.48 Card 00 Chip 04 Channel 72 Mean/Std_dev : 249.13 5.36 Card 00 Chip 04 Channel 73 Mean/Std_dev : 249.76 3.13 Card 00 Chip 04 Channel 74 Mean/Std_dev : 249.20 5.53 Card 00 Chip 04 Channel 75 Mean/Std_dev : 250.01 3.40 Card 00 Chip 04 Channel 76 Mean/Std_dev : 249.55 5.67 Card 00 Chip 04 Channel 77 Mean/Std_dev : 249.21 3.60 Card 00 Chip 04 Channel 78 Mean/Std_dev : 248.93 5.79 ----- End of Frame ----- srv(00).cmd(0): fe hped 5 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 05 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 05 Channel 01 Mean/Std_dev : 475.36 9.94 Card 00 Chip 05 Channel 02 Mean/Std_dev : 249.28 0.70 Card 00 Chip 05 Channel 03 Mean/Std_dev : 249.01 6.22 Card 00 Chip 05 Channel 04 Mean/Std_dev : 249.12 3.59 Card 00 Chip 05 Channel 05 Mean/Std_dev : 249.12 5.85 Card 00 Chip 05 Channel 06 Mean/Std_dev : 248.82 3.80 Card 00 Chip 05 Channel 07 Mean/Std_dev : 249.08 5.68 Card 00 Chip 05 Channel 08 Mean/Std_dev : 248.92 3.56 Card 00 Chip 05 Channel 09 Mean/Std_dev : 250.12 5.72 Card 00 Chip 05 Channel 10 Mean/Std_dev : 248.49 3.63 Card 00 Chip 05 Channel 11 Mean/Std_dev : 249.96 5.53 Card 00 Chip 05 Channel 12 Mean/Std_dev : 249.31 3.53 Card 00 Chip 05 Channel 13 Mean/Std_dev : 249.31 5.39 Card 00 Chip 05 Channel 14 Mean/Std_dev : 250.36 3.74 Card 00 Chip 05 Channel 15 Mean/Std_dev : 249.96 1.49 Card 00 Chip 05 Channel 16 Mean/Std_dev : 249.29 5.37 Card 00 Chip 05 Channel 17 Mean/Std_dev : 248.46 3.65 Card 00 Chip 05 Channel 18 Mean/Std_dev : 249.68 5.20 Card 00 Chip 05 Channel 19 Mean/Std_dev : 249.12 3.60 Card 00 Chip 05 Channel 20 Mean/Std_dev : 249.10 5.35 Card 00 Chip 05 Channel 21 Mean/Std_dev : 249.67 3.63 Card 00 Chip 05 Channel 22 Mean/Std_dev : 249.79 5.15 Card 00 Chip 05 Channel 23 Mean/Std_dev : 248.91 3.57 Card 00 Chip 05 Channel 24 Mean/Std_dev : 248.59 5.10 Card 00 Chip 05 Channel 25 Mean/Std_dev : 249.60 3.78 Card 00 Chip 05 Channel 26 Mean/Std_dev : 249.98 5.13 Card 00 Chip 05 Channel 27 Mean/Std_dev : 249.39 3.51 Card 00 Chip 05 Channel 28 Mean/Std_dev : 249.62 1.67 Card 00 Chip 05 Channel 29 Mean/Std_dev : 249.07 4.98 Card 00 Chip 05 Channel 30 Mean/Std_dev : 249.63 3.60 Card 00 Chip 05 Channel 31 Mean/Std_dev : 249.57 5.01 Card 00 Chip 05 Channel 32 Mean/Std_dev : 249.58 3.54 Card 00 Chip 05 Channel 33 Mean/Std_dev : 249.00 4.83 Card 00 Chip 05 Channel 34 Mean/Std_dev : 250.10 3.72 Card 00 Chip 05 Channel 35 Mean/Std_dev : 249.08 4.94 Card 00 Chip 05 Channel 36 Mean/Std_dev : 249.57 3.64 Card 00 Chip 05 Channel 37 Mean/Std_dev : 250.10 4.91 Card 00 Chip 05 Channel 38 Mean/Std_dev : 249.72 3.75 Card 00 Chip 05 Channel 39 Mean/Std_dev : 249.11 4.57 Card 00 Chip 05 Channel 40 Mean/Std_dev : 249.95 3.63 Card 00 Chip 05 Channel 41 Mean/Std_dev : 249.30 3.34 Card 00 Chip 05 Channel 42 Mean/Std_dev : 250.14 5.31 Card 00 Chip 05 Channel 43 Mean/Std_dev : 248.62 3.30 Card 00 Chip 05 Channel 44 Mean/Std_dev : 249.90 5.30 Card 00 Chip 05 Channel 45 Mean/Std_dev : 249.10 3.41 Card 00 Chip 05 Channel 46 Mean/Std_dev : 250.04 5.30 Card 00 Chip 05 Channel 47 Mean/Std_dev : 249.51 3.49 Card 00 Chip 05 Channel 48 Mean/Std_dev : 248.67 5.21 Card 00 Chip 05 Channel 49 Mean/Std_dev : 249.48 3.32 Card 00 Chip 05 Channel 50 Mean/Std_dev : 249.21 5.26 Card 00 Chip 05 Channel 51 Mean/Std_dev : 249.92 3.35 Card 00 Chip 05 Channel 52 Mean/Std_dev : 249.45 5.25 Card 00 Chip 05 Channel 53 Mean/Std_dev : 249.24 1.57 Card 00 Chip 05 Channel 54 Mean/Std_dev : 249.10 3.27 Card 00 Chip 05 Channel 55 Mean/Std_dev : 249.30 5.25 Card 00 Chip 05 Channel 56 Mean/Std_dev : 249.39 3.46 Card 00 Chip 05 Channel 57 Mean/Std_dev : 249.64 5.28 Card 00 Chip 05 Channel 58 Mean/Std_dev : 248.97 3.20 Card 00 Chip 05 Channel 59 Mean/Std_dev : 249.55 5.41 Card 00 Chip 05 Channel 60 Mean/Std_dev : 248.80 3.34 Card 00 Chip 05 Channel 61 Mean/Std_dev : 249.57 5.48 Card 00 Chip 05 Channel 62 Mean/Std_dev : 249.35 3.42 Card 00 Chip 05 Channel 63 Mean/Std_dev : 248.71 5.42 Card 00 Chip 05 Channel 64 Mean/Std_dev : 249.29 3.33 Card 00 Chip 05 Channel 65 Mean/Std_dev : 248.77 5.70 Card 00 Chip 05 Channel 66 Mean/Std_dev : 249.22 1.62 Card 00 Chip 05 Channel 67 Mean/Std_dev : 249.03 3.38 Card 00 Chip 05 Channel 68 Mean/Std_dev : 249.41 5.72 Card 00 Chip 05 Channel 69 Mean/Std_dev : 249.08 3.36 Card 00 Chip 05 Channel 70 Mean/Std_dev : 247.97 5.86 Card 00 Chip 05 Channel 71 Mean/Std_dev : 249.06 3.35 Card 00 Chip 05 Channel 72 Mean/Std_dev : 249.28 5.84 Card 00 Chip 05 Channel 73 Mean/Std_dev : 249.17 3.44 Card 00 Chip 05 Channel 74 Mean/Std_dev : 248.29 5.84 Card 00 Chip 05 Channel 75 Mean/Std_dev : 249.52 3.55 Card 00 Chip 05 Channel 76 Mean/Std_dev : 249.89 6.03 Card 00 Chip 05 Channel 77 Mean/Std_dev : 248.97 3.56 Card 00 Chip 05 Channel 78 Mean/Std_dev : 248.93 6.12 ----- End of Frame ----- srv(00).cmd(0): fe hped 6 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 06 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 06 Channel 01 Mean/Std_dev : 429.02 10.85 Card 00 Chip 06 Channel 02 Mean/Std_dev : 248.87 0.71 Card 00 Chip 06 Channel 03 Mean/Std_dev : 248.80 6.69 Card 00 Chip 06 Channel 04 Mean/Std_dev : 249.65 3.83 Card 00 Chip 06 Channel 05 Mean/Std_dev : 249.23 6.35 Card 00 Chip 06 Channel 06 Mean/Std_dev : 249.14 3.65 Card 00 Chip 06 Channel 07 Mean/Std_dev : 248.18 6.16 Card 00 Chip 06 Channel 08 Mean/Std_dev : 249.45 3.78 Card 00 Chip 06 Channel 09 Mean/Std_dev : 249.17 5.87 Card 00 Chip 06 Channel 10 Mean/Std_dev : 249.27 3.64 Card 00 Chip 06 Channel 11 Mean/Std_dev : 248.83 6.00 Card 00 Chip 06 Channel 12 Mean/Std_dev : 248.95 3.72 Card 00 Chip 06 Channel 13 Mean/Std_dev : 249.60 5.87 Card 00 Chip 06 Channel 14 Mean/Std_dev : 249.61 3.58 Card 00 Chip 06 Channel 15 Mean/Std_dev : 248.94 1.70 Card 00 Chip 06 Channel 16 Mean/Std_dev : 248.50 5.69 Card 00 Chip 06 Channel 17 Mean/Std_dev : 249.00 3.75 Card 00 Chip 06 Channel 18 Mean/Std_dev : 249.40 5.70 Card 00 Chip 06 Channel 19 Mean/Std_dev : 248.80 3.67 Card 00 Chip 06 Channel 20 Mean/Std_dev : 249.11 5.50 Card 00 Chip 06 Channel 21 Mean/Std_dev : 249.18 3.79 Card 00 Chip 06 Channel 22 Mean/Std_dev : 248.93 5.60 Card 00 Chip 06 Channel 23 Mean/Std_dev : 248.99 3.77 Card 00 Chip 06 Channel 24 Mean/Std_dev : 249.79 5.63 Card 00 Chip 06 Channel 25 Mean/Std_dev : 248.85 3.66 Card 00 Chip 06 Channel 26 Mean/Std_dev : 249.16 5.30 Card 00 Chip 06 Channel 27 Mean/Std_dev : 248.44 3.81 Card 00 Chip 06 Channel 28 Mean/Std_dev : 248.58 1.68 Card 00 Chip 06 Channel 29 Mean/Std_dev : 249.36 5.54 Card 00 Chip 06 Channel 30 Mean/Std_dev : 248.42 3.63 Card 00 Chip 06 Channel 31 Mean/Std_dev : 248.97 5.17 Card 00 Chip 06 Channel 32 Mean/Std_dev : 249.17 3.77 Card 00 Chip 06 Channel 33 Mean/Std_dev : 248.73 5.31 Card 00 Chip 06 Channel 34 Mean/Std_dev : 249.23 3.72 Card 00 Chip 06 Channel 35 Mean/Std_dev : 249.82 5.29 Card 00 Chip 06 Channel 36 Mean/Std_dev : 249.58 3.70 Card 00 Chip 06 Channel 37 Mean/Std_dev : 249.17 5.07 Card 00 Chip 06 Channel 38 Mean/Std_dev : 249.34 3.83 Card 00 Chip 06 Channel 39 Mean/Std_dev : 248.81 4.79 Card 00 Chip 06 Channel 40 Mean/Std_dev : 248.44 3.67 Card 00 Chip 06 Channel 41 Mean/Std_dev : 249.28 3.49 Card 00 Chip 06 Channel 42 Mean/Std_dev : 249.13 5.80 Card 00 Chip 06 Channel 43 Mean/Std_dev : 249.26 3.46 Card 00 Chip 06 Channel 44 Mean/Std_dev : 248.59 5.86 Card 00 Chip 06 Channel 45 Mean/Std_dev : 249.05 3.46 Card 00 Chip 06 Channel 46 Mean/Std_dev : 248.98 5.70 Card 00 Chip 06 Channel 47 Mean/Std_dev : 249.32 3.42 Card 00 Chip 06 Channel 48 Mean/Std_dev : 249.01 5.71 Card 00 Chip 06 Channel 49 Mean/Std_dev : 248.44 3.42 Card 00 Chip 06 Channel 50 Mean/Std_dev : 248.71 5.61 Card 00 Chip 06 Channel 51 Mean/Std_dev : 248.65 3.44 Card 00 Chip 06 Channel 52 Mean/Std_dev : 248.89 5.79 Card 00 Chip 06 Channel 53 Mean/Std_dev : 249.28 1.60 Card 00 Chip 06 Channel 54 Mean/Std_dev : 249.10 3.39 Card 00 Chip 06 Channel 55 Mean/Std_dev : 249.23 5.80 Card 00 Chip 06 Channel 56 Mean/Std_dev : 249.93 3.56 Card 00 Chip 06 Channel 57 Mean/Std_dev : 249.31 5.84 Card 00 Chip 06 Channel 58 Mean/Std_dev : 249.47 3.47 Card 00 Chip 06 Channel 59 Mean/Std_dev : 249.32 5.91 Card 00 Chip 06 Channel 60 Mean/Std_dev : 249.75 3.52 Card 00 Chip 06 Channel 61 Mean/Std_dev : 248.87 5.97 Card 00 Chip 06 Channel 62 Mean/Std_dev : 248.97 3.39 Card 00 Chip 06 Channel 63 Mean/Std_dev : 249.55 6.19 Card 00 Chip 06 Channel 64 Mean/Std_dev : 248.68 3.44 Card 00 Chip 06 Channel 65 Mean/Std_dev : 249.08 6.14 Card 00 Chip 06 Channel 66 Mean/Std_dev : 249.23 1.60 Card 00 Chip 06 Channel 67 Mean/Std_dev : 249.40 3.61 Card 00 Chip 06 Channel 68 Mean/Std_dev : 248.63 6.12 Card 00 Chip 06 Channel 69 Mean/Std_dev : 249.34 3.51 Card 00 Chip 06 Channel 70 Mean/Std_dev : 248.93 6.28 Card 00 Chip 06 Channel 71 Mean/Std_dev : 249.05 3.46 Card 00 Chip 06 Channel 72 Mean/Std_dev : 249.52 6.39 Card 00 Chip 06 Channel 73 Mean/Std_dev : 249.64 3.58 Card 00 Chip 06 Channel 74 Mean/Std_dev : 248.67 6.48 Card 00 Chip 06 Channel 75 Mean/Std_dev : 248.52 3.46 Card 00 Chip 06 Channel 76 Mean/Std_dev : 248.90 6.70 Card 00 Chip 06 Channel 77 Mean/Std_dev : 249.83 3.55 Card 00 Chip 06 Channel 78 Mean/Std_dev : 248.89 6.83 ----- End of Frame ----- srv(00).cmd(0): fe hped 7 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 07 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 07 Channel 01 Mean/Std_dev : 388.78 8.82 Card 00 Chip 07 Channel 02 Mean/Std_dev : 249.67 0.70 Card 00 Chip 07 Channel 03 Mean/Std_dev : 249.63 7.60 Card 00 Chip 07 Channel 04 Mean/Std_dev : 248.79 4.09 Card 00 Chip 07 Channel 05 Mean/Std_dev : 249.16 6.92 Card 00 Chip 07 Channel 06 Mean/Std_dev : 249.09 3.95 Card 00 Chip 07 Channel 07 Mean/Std_dev : 248.80 6.99 Card 00 Chip 07 Channel 08 Mean/Std_dev : 249.59 3.92 Card 00 Chip 07 Channel 09 Mean/Std_dev : 249.28 6.87 Card 00 Chip 07 Channel 10 Mean/Std_dev : 249.30 3.91 Card 00 Chip 07 Channel 11 Mean/Std_dev : 249.71 6.87 Card 00 Chip 07 Channel 12 Mean/Std_dev : 249.32 3.90 Card 00 Chip 07 Channel 13 Mean/Std_dev : 249.34 6.56 Card 00 Chip 07 Channel 14 Mean/Std_dev : 248.91 4.13 Card 00 Chip 07 Channel 15 Mean/Std_dev : 249.36 1.72 Card 00 Chip 07 Channel 16 Mean/Std_dev : 249.65 6.41 Card 00 Chip 07 Channel 17 Mean/Std_dev : 249.33 4.05 Card 00 Chip 07 Channel 18 Mean/Std_dev : 248.95 6.59 Card 00 Chip 07 Channel 19 Mean/Std_dev : 248.14 3.97 Card 00 Chip 07 Channel 20 Mean/Std_dev : 249.74 6.49 Card 00 Chip 07 Channel 21 Mean/Std_dev : 248.73 4.09 Card 00 Chip 07 Channel 22 Mean/Std_dev : 249.11 6.30 Card 00 Chip 07 Channel 23 Mean/Std_dev : 249.91 4.00 Card 00 Chip 07 Channel 24 Mean/Std_dev : 249.44 6.28 Card 00 Chip 07 Channel 25 Mean/Std_dev : 249.60 4.11 Card 00 Chip 07 Channel 26 Mean/Std_dev : 249.12 6.19 Card 00 Chip 07 Channel 27 Mean/Std_dev : 250.05 4.16 Card 00 Chip 07 Channel 28 Mean/Std_dev : 249.55 1.81 Card 00 Chip 07 Channel 29 Mean/Std_dev : 249.57 6.16 Card 00 Chip 07 Channel 30 Mean/Std_dev : 248.36 4.12 Card 00 Chip 07 Channel 31 Mean/Std_dev : 248.85 6.00 Card 00 Chip 07 Channel 32 Mean/Std_dev : 249.68 4.00 Card 00 Chip 07 Channel 33 Mean/Std_dev : 249.48 6.07 Card 00 Chip 07 Channel 34 Mean/Std_dev : 249.21 4.24 Card 00 Chip 07 Channel 35 Mean/Std_dev : 250.25 6.07 Card 00 Chip 07 Channel 36 Mean/Std_dev : 249.83 3.98 Card 00 Chip 07 Channel 37 Mean/Std_dev : 249.76 6.00 Card 00 Chip 07 Channel 38 Mean/Std_dev : 249.39 4.12 Card 00 Chip 07 Channel 39 Mean/Std_dev : 249.20 5.33 Card 00 Chip 07 Channel 40 Mean/Std_dev : 249.69 4.16 Card 00 Chip 07 Channel 41 Mean/Std_dev : 249.15 3.80 Card 00 Chip 07 Channel 42 Mean/Std_dev : 248.56 6.76 Card 00 Chip 07 Channel 43 Mean/Std_dev : 249.49 3.59 Card 00 Chip 07 Channel 44 Mean/Std_dev : 249.62 6.52 Card 00 Chip 07 Channel 45 Mean/Std_dev : 249.61 3.75 Card 00 Chip 07 Channel 46 Mean/Std_dev : 249.38 6.62 Card 00 Chip 07 Channel 47 Mean/Std_dev : 249.89 3.89 Card 00 Chip 07 Channel 48 Mean/Std_dev : 248.95 6.61 Card 00 Chip 07 Channel 49 Mean/Std_dev : 249.04 3.67 Card 00 Chip 07 Channel 50 Mean/Std_dev : 248.43 6.60 Card 00 Chip 07 Channel 51 Mean/Std_dev : 249.16 3.73 Card 00 Chip 07 Channel 52 Mean/Std_dev : 249.43 6.70 Card 00 Chip 07 Channel 53 Mean/Std_dev : 249.59 1.55 Card 00 Chip 07 Channel 54 Mean/Std_dev : 249.24 3.77 Card 00 Chip 07 Channel 55 Mean/Std_dev : 249.69 6.58 Card 00 Chip 07 Channel 56 Mean/Std_dev : 249.71 3.77 Card 00 Chip 07 Channel 57 Mean/Std_dev : 250.04 6.62 Card 00 Chip 07 Channel 58 Mean/Std_dev : 248.40 3.86 Card 00 Chip 07 Channel 59 Mean/Std_dev : 248.82 6.93 Card 00 Chip 07 Channel 60 Mean/Std_dev : 249.49 3.78 Card 00 Chip 07 Channel 61 Mean/Std_dev : 248.96 6.78 Card 00 Chip 07 Channel 62 Mean/Std_dev : 249.09 3.74 Card 00 Chip 07 Channel 63 Mean/Std_dev : 248.73 6.85 Card 00 Chip 07 Channel 64 Mean/Std_dev : 249.67 3.73 Card 00 Chip 07 Channel 65 Mean/Std_dev : 249.22 7.02 Card 00 Chip 07 Channel 66 Mean/Std_dev : 249.13 1.54 Card 00 Chip 07 Channel 67 Mean/Std_dev : 249.05 3.70 Card 00 Chip 07 Channel 68 Mean/Std_dev : 249.07 6.98 Card 00 Chip 07 Channel 69 Mean/Std_dev : 249.07 3.76 Card 00 Chip 07 Channel 70 Mean/Std_dev : 250.02 7.05 Card 00 Chip 07 Channel 71 Mean/Std_dev : 248.78 3.89 Card 00 Chip 07 Channel 72 Mean/Std_dev : 250.10 7.05 Card 00 Chip 07 Channel 73 Mean/Std_dev : 249.55 3.86 Card 00 Chip 07 Channel 74 Mean/Std_dev : 250.18 7.16 Card 00 Chip 07 Channel 75 Mean/Std_dev : 249.23 3.74 Card 00 Chip 07 Channel 76 Mean/Std_dev : 249.19 7.38 Card 00 Chip 07 Channel 77 Mean/Std_dev : 249.08 4.04 Card 00 Chip 07 Channel 78 Mean/Std_dev : 249.91 7.69 ----- End of Frame ----- srv(00).cmd(0): fe hped 0:15 * setthr 250 5.0 0 Tdcm(0) Fem(00): hped setthr done on 1264 histograms. Underflow: 0 Overflow: 0 ped: 250 thr: 5.00 srv(00).cmd(0): be serve_target 1 0 Tdcm(0) Serve_Target <- 1 (0) >srv(00).cmd(0): fe fec_enable 0 Tdcm(0) Fem(00) Reg(1) = 0x24000f (2359311) FEC_Enable: 1 srv(00).cmd(0): fe mode after 0 Tdcm(0) Fem(00) Reg(0) <- 0x400 srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 read 3 0 Tdcm(0) Fem(00) After(0) Reg(3): 0x0 0x101 0x101 srv(00).cmd(0): fe after 1 read 3 0 Tdcm(0) Fem(00) After(1) Reg(3): 0x0 0x202 0x202 srv(00).cmd(0): fe after 2 read 3 0 Tdcm(0) Fem(00) After(2) Reg(3): 0x0 0x303 0x303 srv(00).cmd(0): fe after 3 read 3 0 Tdcm(0) Fem(00) After(3) Reg(3): 0x0 0x404 0x404 srv(00).cmd(0): fe after 4 read 3 0 Tdcm(0) Fem(00) After(4) Reg(3): 0x0 0x505 0x505 srv(00).cmd(0): fe after 5 read 3 0 Tdcm(0) Fem(00) After(5) Reg(3): 0x0 0x606 0x606 srv(00).cmd(0): fe after 6 read 3 0 Tdcm(0) Fem(00) After(6) Reg(3): 0x0 0x707 0x707 srv(00).cmd(0): fe after 7 read 3 0 Tdcm(0) Fem(00) After(7) Reg(3): 0x0 0x808 0x808 srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: (0) >srv(00).cmd(0): fe moni T 0 0 Tdcm(0) Fem(00) FEC_T: 25.062 degC srv(00).cmd(0): fe moni V 0 0 Tdcm(0) Fem(00) FEC_Vdd: 3.290 V srv(00).cmd(0): fe moni A 0 0 Tdcm(0) Fem(00) FEC_Vad: 1.650 V srv(00).cmd(0): fe moni I 0 0 Tdcm(0) Fem(00) FEC_I: 0.952 A srv(00).cmd(0): fe moni S 0 0 Tdcm(0) Fem(00) FEC_Serial: c90000027e3cbb26 srv(00).cmd(0): fe moni T 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni V 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni A 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni I 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni S 1 0 Tdcm(0) Fem(00) FEC_Serial: 0000000000000000 srv(00).cmd(0): fe moni T 2 0 Tdcm(0) Fem(00) FEM_T: 26.625 degC srv(00).cmd(0): fe moni V 2 0 Tdcm(0) Fem(00) FEM_Vdd: 2.490 V srv(00).cmd(0): fe moni A 2 0 Tdcm(0) Fem(00) FEM_Vad: 4.721 V srv(00).cmd(0): fe moni I 2 0 Tdcm(0) Fem(00) FEM_I: 1.780 A srv(00).cmd(0): fe moni S 2 0 Tdcm(0) Fem(00) FEM_Serial: 890000024d14dc26 srv(00).cmd(0): fe xadc read 0 0 Tdcm(0) Fem(00) Temperature = 38.266 srv(00).cmd(0): fe xadc read 1 0 Tdcm(0) Fem(00) Vccint = 0.994 srv(00).cmd(0): fe xadc read 2 0 Tdcm(0) Fem(00) Vccaux = 1.791 srv(00).cmd(0): fe xadc read 3 0 Tdcm(0) Fem(00) Vp-Vn = 1.424 srv(00).cmd(0): fe xadc read 16 0 Tdcm(0) Fem(00) V_input = 4.751 srv(00).cmd(0): fe xadc read 17 0 Tdcm(0) Fem(00) I_input = 1.776 srv(00).cmd(0): fe xadc read 18 0 Tdcm(0) Fem(00) V_33 = 3.312 srv(00).cmd(0): fe xadc read 19 0 Tdcm(0) Fem(00) V_25 = 2.517 srv(00).cmd(0): fe xadc read 20 0 Tdcm(0) Fem(00) I_25 = 0.223 srv(00).cmd(0): fe xadc read 21 0 Tdcm(0) Fem(00) V_18 = 1.799 srv(00).cmd(0): fe xadc read 22 0 Tdcm(0) Fem(00) I_18 = 0.344 srv(00).cmd(0): fe xadc read 23 0 Tdcm(0) Fem(00) I_10 = 0.167 srv(00).cmd(0): fe sfp info 0 Tdcm(0) SFP FINISARCORP. FTLF8519P3BNLA srv(00).cmd(0): fe sfp moni 0 Tdcm(0) SFP Vcc(V) 3.263 I(mA) 4.8 Txp(uW) 317.4 Rxp(uW) 306.6 T(dgC) 26.2 TX_Fault 0 RX_Los 0 (0) >srv(00).rep(?): path: "../data/" srv(00).cmd(0): path ../data srv(00).cmd(0): DAQ 0 srv(00).cmd(0): credits restore 8 1 F srv(00).cmd(0): daq 0xFFFFFF F 0 Tdcm(0): daq paused srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe emit_hit_cnt 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe emit_empty_ch 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe emit_lst_cell_rd 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe keep_rst 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe skip_rst 2 0 Tdcm(0) Fem(00) Reg(0) <- 0x40000 srv(00).cmd(0): fe test_enable 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_mode 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe tdata A 0x1FE 0 Tdcm(0) Fem(00) TestData: linear ramp from 0 to 509 srv(00).cmd(0): fe test_zbt 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe keep_fco 0 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 srv(00).cmd(0): fe after 0:7 test_mode 0x1 0 Tdcm(0) Fem(00) After(0:7) Reg(1) <- Test_mode=calibration srv(00).cmd(0): fe after 0:7 write 3 0x0 0x0001 0x0000 0 Tdcm(0) Fem(00) After(0:7) Reg(3) <- 0x0 0x1 0x0 (wrote 8 chip(s)) srv(00).cmd(0): fe after 0:7 write 4 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0:7) Reg(4) <- 0x0 0x0 0x0 (wrote 8 chip(s)) srv(00).cmd(0): fe pulser model T2K2 0 Tdcm(0) Fem(00) pulser_DAC <- 3 (T2K2) srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): fe pulser delay 5000 0 Tdcm(0) Fem(00) Reg(3) <- 0x1388 srv(00).cmd(0): fe pulser enable 1 0 Tdcm(0) Fem(00) Reg(3) <- 0x10000 srv(00).cmd(0): fe pulser ft_enable 0 0 Tdcm(0) Fem(00) Reg(3) <- 0x0 srv(00).cmd(0): fe subtract_ped 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x4000 srv(00).cmd(0): fe zero_suppress 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x2000 srv(00).cmd(0): fe zs_pre_post 4 8 0 Tdcm(0) Fem(00) Reg(5) <- 0xc4 srv(00).cmd(0): fe zs_keep_tail 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): be eb keep_fem_soe 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): be eb check_ev_nb 1 0 Tdcm(0) Reg(0) <- 0x800000 srv(00).cmd(0): be eb check_ev_ts 1 0 Tdcm(0) Reg(0) <- 0x1000000 srv(00).cmd(0): be eb ts_tolerance 0 0 Tdcm(0) Reg(0) = 0x1a40000 (27525120) Time_Stamp_Tolerance +/-: 0 srv(00).cmd(0): be eb do_eof_on_eoe 1 0 Tdcm(0) Reg(0) <- 0x8000000 srv(00).cmd(0): be event_limit 0x1 0 Tdcm(0) Reg(6) <- 0x200 srv(00).cmd(0): be trig_rate 0 10 0 Tdcm(0) Reg(6) <- 0xa Opened result file: "../data/R2024_12_12-11_54_45-000.txt" srv(00).cmd(0): fopen asc srv(00).cmd(0): vflags 0x0 srv(00).cmd(0): DAQ 1000000000000 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be ss_trig_ena 1 0 Tdcm(0) Reg(6) <- 0x10000 srv(00).cmd(0): be ss_trig_delay 6 0 Tdcm(0) Reg(14) <- 0x6 srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be isobus 0x0C 0 Tdcm(0) Reg(5) <- 0x0000000c ( CLR_EVCNT CLR_TSTAMP auto-clear) srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser ampl 7500 0 Tdcm(0) Fem(00) Pulser_Amplitude <- 0x1d4c srv(00).cmd(0): be isobus 0x60 0 Tdcm(0) Reg(5) <- 0x00000060 ( WCK_SYNCH SCA_START auto-clear) srv(00).cmd(0): DAQ 0 DAQ: collected 0 B (0 bytes 1000000000000 bytes left) speed: 0.00 MB/s srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): fe pulser ampl 7500 0 Tdcm(0) Fem(00) Pulser_Amplitude <- 0x1d4c srv(00).cmd(0): be isobus 0x60 0 Tdcm(0) Reg(5) <- 0x00000060 ( WCK_SYNCH SCA_START auto-clear) srv(00).cmd(0): DAQ 0 DAQ: collected 190 B (190 bytes 999999999810 bytes left) speed: 0.00 MB/s srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): sleep 2 srv(00).cmd(0): DAQ 100000000 srv(00).cmd(0): sleep 1 srv(00).cmd(0): DAQ 0 DAQ: collected 0 B (0 bytes 100000000 bytes left) speed: 0.00 MB/s File closed srv(00).cmd(0): fclose (0) >srv(00).cmd(0): quit CmdFetcher_Main: completed. FemArray_ReceiveLoop: completed. femarray: Thread_Join done. eventbuilder: Thread_Join done.