FemArray_ReceiveLoop: started CmdFetcher_Main: started --------------------------------- Client version : 2.11 Compiled : Dec 5 2024 at 14:24:00 Target Server : TDCM Commands : from stdin --------------------------------- (0) >srv(00).cmd(0): be dcbal_enc 1 0 Tdcm(0) Reg(3) <- 0x80000 srv(00).cmd(0): be inv_tdcm_mosi 0 0 Tdcm(0) Reg(3) <- 0x0 srv(00).cmd(0): be fe active fe_workset 0 Tdcm(0) Reg(10) <- 0x1 srv(00).cmd(0): be sel_fe fe_workset 0 Tdcm(0) Selected_FE <- 00 srv(00).cmd(0): be iic sfpmezz 0 enable fe_workset 0 Tdcm(0) SFP Mezzanine 0 Tx_Disable <- 0xfffe srv(00).cmd(0): be tx_reset 1 0 Tdcm(0) Reg(3) <- 0x00010000 srv(00).cmd(0): be rx_reset fe_workset cycle 0 Tdcm(0) Reg(0) <- 0x00010000 <- 0x00000000 (done on 1 FE(s)) srv(00).cmd(0): be tx_reset 0 0 Tdcm(0) Reg(3) <- 0x00000000 srv(00).cmd(0): sleep 4 srv(00).cmd(0): be dna get 0 Tdcm(0): Errors: 0 DNA_Found: 1 srv(00).cmd(0): be dna push 0 Tdcm(0): Errors: 0 DNA-ID_Pushed: 1 srv(00).cmd(0): be dna get 0 Tdcm(0): Errors: 0 DNA_Found: 1 srv(00).cmd(0): fe dna show 0 Tdcm(0): Fem(00) DNA: 89000002 4d14dc26 got_dna: 1 id_is_set: 1 my_id: 0 srv(00).cmd(0): fe sca enable 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena 0x0 0 Tdcm(0) Reg(4) <- 0x0 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be eb run 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): fe delay_adc dco 0 0xF 0 Tdcm(0) Fem(00) Reg(14) <- 0xf Delay_dco(0) <- 15 srv(00).cmd(0): fe delay_adc dco 1 0xF 0 Tdcm(0) Fem(00) Reg(14) <- 0xf0 Delay_dco(1) <- 15 srv(00).cmd(0): fe delay_adc fco 0 0x0 0 Tdcm(0) Fem(00) Reg(14) <- 0x0 Delay_fco(0) <- 0 srv(00).cmd(0): fe delay_adc fco 1 0x0 0 Tdcm(0) Fem(00) Reg(14) <- 0x0 Delay_fco(1) <- 0 srv(00).cmd(0): fe delay_adc pipe 0 0x8 0 Tdcm(0) Fem(00) Reg(14) <- 0x80000 Delay_pipe(0) <- 8 srv(00).cmd(0): fe delay_adc pipe 1 0x8 0 Tdcm(0) Fem(00) Reg(14) <- 0x80000 Delay_pipe(1) <- 8 srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: (0) >srv(00).cmd(0): fe sca enable 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena 0x0 0 Tdcm(0) Reg(4) <- 0x0 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be eb run 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): fe mode after 0 Tdcm(0) Fem(00) Reg(0) <- 0x400 srv(00).cmd(0): fe fec_mask 0x2 0 Tdcm(0) Fem(00) Reg(1) <- 0x200000 srv(00).cmd(0): fe fec_enable 0x1 0 Tdcm(0) Fem(00) Reg(1) <- 0x40000 srv(00).cmd(0): fe asic_mask 0xFF00 0 Tdcm(0) Fem(00) Reg(9) <- 0xff000000 srv(00).cmd(0): fe test_enable 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_mode 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_zbt 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe adc 0 model AD9637 0 Tdcm(0) Fem(00) ADC_model <- 3 (AD9637) srv(00).cmd(0): fe adc 0 write 0x14 0x00 0 Tdcm(0) Fem(00) Front-End ADC Reg(20) <- 0x0 (0) srv(00).cmd(0): fe adc 1 model AD9637 0 Tdcm(0) Fem(00) ADC_model <- 3 (AD9637) srv(00).cmd(0): fe adc 1 write 0x14 0x00 0 Tdcm(0) Fem(00) Front-End ADC Reg(20) <- 0x0 (0) srv(00).cmd(0): fe after 0:15 gain 120 0 Tdcm(0) Fem(00) After(0:15) Reg(1) <- Gain=120fC srv(00).cmd(0): fe after 0:15 time 412 0 Tdcm(0) Fem(00) After(0:15) Reg(1) <- Shaping=412ns srv(00).cmd(0): fe after 0:15 write 2 0x0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- 0x0 (wrote 16 chip(s)) srv(00).cmd(0): fe after 0:15 en_mkr_rst 1 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Marker=1 srv(00).cmd(0): fe after 0:15 rst_level 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Marker_Level=0 srv(00).cmd(0): fe after 0:15 rd_from_0 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Read_From_0=0 srv(00).cmd(0): fe after 0:15 test_digout 0 0 Tdcm(0) Fem(00) After(0:15) Reg(2) <- Test_Digout=0 srv(00).cmd(0): fe polarity 0:15 0x0 0 Tdcm(0) Fem(00) Reg(3) <- 0x0 (performed 16 actions) srv(00).cmd(0): fe forceon_all 0x1 0 Tdcm(0) Fem(00) Reg(0) <- 0x1000 srv(00).cmd(0): fe sca cnt 0x1fe 0 Tdcm(0) Fem(00) Reg(0) <- 0x1fe srv(00).cmd(0): fe sca wckdiv 0x4 0 Tdcm(0) Fem(00) Reg(5) <- 0x40000 srv(00).cmd(0): fe crc32_insert_ena 1 0 Tdcm(0) Fem(00) Reg(6) <- 0x40 srv(00).cmd(0): fe keep_fco 0x0 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 srv(00).cmd(0): fe rst_len 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x800 srv(00).cmd(0): fe skip_rst 0x0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe keep_rst 0x1 0 Tdcm(0) Fem(00) Reg(0) <- 0x10000 srv(00).cmd(0): fe emit_lst_cell_rd 0x1 0 Tdcm(0) Fem(00) Reg(5) <- 0x2000 srv(00).cmd(0): fe trig_ena 0x8 0 Tdcm(0) Fem(00) Reg(2) <- 0x80000000 srv(00).cmd(0): fe sca enable 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x100000 srv(00).cmd(0): fe fra_timeout 0 0 Tdcm(0) Fem(00) Reg(6) <- 0x0 srv(00).cmd(0): sleep 1 srv(00).cmd(0): be crc32_check_ena 1 0 Tdcm(0) Reg(3) <- 0x00000020 srv(00).cmd(0): be serve_target 1 0 Tdcm(0) Serve_Target <- 1 srv(00).cmd(0): be pump timed 1 0 Tdcm(0) Reg(0) <- 0x40000 srv(00).cmd(0): be pump timeout 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): be pump ena fe_workset 0 Tdcm(0) Reg(4) <- 0x1 srv(00).cmd(0): be eb keep_fem_soe 1 0 Tdcm(0) Reg(0) <- 0x400000 srv(00).cmd(0): be eb check_ev_nb 1 0 Tdcm(0) Reg(0) <- 0x800000 srv(00).cmd(0): be eb check_ev_ts 1 0 Tdcm(0) Reg(0) <- 0x1000000 srv(00).cmd(0): be eb ts_tolerance 0 0 Tdcm(0) Reg(0) = 0x1c40000 (29622272) Time_Stamp_Tolerance +/-: 0 srv(00).cmd(0): be eb run 1 0 Tdcm(0) Reg(0) <- 0x200000 srv(00).cmd(0): be read_abort_ena 0 0 Tdcm(0) Reg(14) <- 0x0 srv(00).cmd(0): be event_limit 0x1 0 Tdcm(0) Reg(6) <- 0x200 srv(00).cmd(0): be trig_rate 1 10 0 Tdcm(0) Reg(6) <- 0x8a srv(00).cmd(0): fe subtract_ped 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe zero_suppress 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe hped 0:15 * offset 0 0 Tdcm(0) Fem(00): hped offset done on 1264 histograms. Underflow: 0 Overflow: 0 ped: 0 srv(00).cmd(0): fe hped 0:15 * clr 0 Tdcm(0) Fem(00): hped clr done on 1264 histograms. Underflow: 0 Overflow: 0 srv(00).cmd(0): be serve_target 2 0 Tdcm(0) Serve_Target <- 2 srv(00).cmd(0): be isobus 0x0C 0 Tdcm(0) Reg(5) <- 0x0000000c ( CLR_EVCNT CLR_TSTAMP auto-clear) srv(00).cmd(0): be isobus 0x20 0 Tdcm(0) Reg(5) <- 0x00000020 ( SCA_START auto-clear) srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): fe hped 0 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 00 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 00 Channel 01 Mean/Std_dev : 665.83 7.70 Card 00 Chip 00 Channel 02 Mean/Std_dev : 333.85 0.77 Card 00 Chip 00 Channel 03 Mean/Std_dev : 293.57 4.92 Card 00 Chip 00 Channel 04 Mean/Std_dev : 294.71 3.29 Card 00 Chip 00 Channel 05 Mean/Std_dev : 266.44 4.74 Card 00 Chip 00 Channel 06 Mean/Std_dev : 278.26 3.39 Card 00 Chip 00 Channel 07 Mean/Std_dev : 317.91 4.78 Card 00 Chip 00 Channel 08 Mean/Std_dev : 223.32 3.19 Card 00 Chip 00 Channel 09 Mean/Std_dev : 256.93 4.63 Card 00 Chip 00 Channel 10 Mean/Std_dev : 260.24 3.47 Card 00 Chip 00 Channel 11 Mean/Std_dev : 262.38 4.61 Card 00 Chip 00 Channel 12 Mean/Std_dev : 274.39 3.20 Card 00 Chip 00 Channel 13 Mean/Std_dev : 233.19 4.55 Card 00 Chip 00 Channel 14 Mean/Std_dev : 294.57 3.36 Card 00 Chip 00 Channel 15 Mean/Std_dev : 251.39 1.63 Card 00 Chip 00 Channel 16 Mean/Std_dev : 291.88 4.44 Card 00 Chip 00 Channel 17 Mean/Std_dev : 305.63 3.25 Card 00 Chip 00 Channel 18 Mean/Std_dev : 288.35 4.29 Card 00 Chip 00 Channel 19 Mean/Std_dev : 285.83 3.19 Card 00 Chip 00 Channel 20 Mean/Std_dev : 265.75 4.23 Card 00 Chip 00 Channel 21 Mean/Std_dev : 284.10 3.26 Card 00 Chip 00 Channel 22 Mean/Std_dev : 298.74 4.31 Card 00 Chip 00 Channel 23 Mean/Std_dev : 286.62 3.28 Card 00 Chip 00 Channel 24 Mean/Std_dev : 303.03 4.40 Card 00 Chip 00 Channel 25 Mean/Std_dev : 262.21 3.18 Card 00 Chip 00 Channel 26 Mean/Std_dev : 237.32 4.22 Card 00 Chip 00 Channel 27 Mean/Std_dev : 272.51 3.18 Card 00 Chip 00 Channel 28 Mean/Std_dev : 273.65 1.77 Card 00 Chip 00 Channel 29 Mean/Std_dev : 294.60 4.26 Card 00 Chip 00 Channel 30 Mean/Std_dev : 302.25 3.30 Card 00 Chip 00 Channel 31 Mean/Std_dev : 207.85 4.04 Card 00 Chip 00 Channel 32 Mean/Std_dev : 269.16 3.24 Card 00 Chip 00 Channel 33 Mean/Std_dev : 253.41 4.02 Card 00 Chip 00 Channel 34 Mean/Std_dev : 334.75 3.24 Card 00 Chip 00 Channel 35 Mean/Std_dev : 250.22 4.10 Card 00 Chip 00 Channel 36 Mean/Std_dev : 243.97 3.30 Card 00 Chip 00 Channel 37 Mean/Std_dev : 257.52 3.99 Card 00 Chip 00 Channel 38 Mean/Std_dev : 253.86 3.32 Card 00 Chip 00 Channel 39 Mean/Std_dev : 274.65 3.72 Card 00 Chip 00 Channel 40 Mean/Std_dev : 331.14 3.25 Card 00 Chip 00 Channel 41 Mean/Std_dev : 252.57 3.08 Card 00 Chip 00 Channel 42 Mean/Std_dev : 251.60 3.97 Card 00 Chip 00 Channel 43 Mean/Std_dev : 281.63 3.09 Card 00 Chip 00 Channel 44 Mean/Std_dev : 204.72 4.03 Card 00 Chip 00 Channel 45 Mean/Std_dev : 286.00 3.07 Card 00 Chip 00 Channel 46 Mean/Std_dev : 205.99 3.93 Card 00 Chip 00 Channel 47 Mean/Std_dev : 228.55 3.07 Card 00 Chip 00 Channel 48 Mean/Std_dev : 280.20 4.14 Card 00 Chip 00 Channel 49 Mean/Std_dev : 232.83 3.21 Card 00 Chip 00 Channel 50 Mean/Std_dev : 328.65 4.04 Card 00 Chip 00 Channel 51 Mean/Std_dev : 222.01 3.00 Card 00 Chip 00 Channel 52 Mean/Std_dev : 230.85 4.12 Card 00 Chip 00 Channel 53 Mean/Std_dev : 316.16 1.50 Card 00 Chip 00 Channel 54 Mean/Std_dev : 331.96 3.06 Card 00 Chip 00 Channel 55 Mean/Std_dev : 257.43 4.12 Card 00 Chip 00 Channel 56 Mean/Std_dev : 224.30 3.04 Card 00 Chip 00 Channel 57 Mean/Std_dev : 315.02 4.25 Card 00 Chip 00 Channel 58 Mean/Std_dev : 277.61 3.10 Card 00 Chip 00 Channel 59 Mean/Std_dev : 261.10 4.09 Card 00 Chip 00 Channel 60 Mean/Std_dev : 257.85 2.95 Card 00 Chip 00 Channel 61 Mean/Std_dev : 279.09 4.20 Card 00 Chip 00 Channel 62 Mean/Std_dev : 261.31 3.26 Card 00 Chip 00 Channel 63 Mean/Std_dev : 258.74 4.23 Card 00 Chip 00 Channel 64 Mean/Std_dev : 285.15 3.01 Card 00 Chip 00 Channel 65 Mean/Std_dev : 223.73 4.20 Card 00 Chip 00 Channel 66 Mean/Std_dev : 235.03 1.51 Card 00 Chip 00 Channel 67 Mean/Std_dev : 252.06 3.26 Card 00 Chip 00 Channel 68 Mean/Std_dev : 264.85 4.25 Card 00 Chip 00 Channel 69 Mean/Std_dev : 265.68 3.08 Card 00 Chip 00 Channel 70 Mean/Std_dev : 327.56 4.18 Card 00 Chip 00 Channel 71 Mean/Std_dev : 230.32 3.15 Card 00 Chip 00 Channel 72 Mean/Std_dev : 208.57 4.21 Card 00 Chip 00 Channel 73 Mean/Std_dev : 314.59 3.00 Card 00 Chip 00 Channel 74 Mean/Std_dev : 298.35 4.29 Card 00 Chip 00 Channel 75 Mean/Std_dev : 229.28 3.16 Card 00 Chip 00 Channel 76 Mean/Std_dev : 217.99 4.29 Card 00 Chip 00 Channel 77 Mean/Std_dev : 318.80 3.05 Card 00 Chip 00 Channel 78 Mean/Std_dev : 239.45 4.31 ----- End of Frame ----- srv(00).cmd(0): fe hped 1 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 01 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 01 Channel 01 Mean/Std_dev : 621.64 7.78 Card 00 Chip 01 Channel 02 Mean/Std_dev : 314.26 0.77 Card 00 Chip 01 Channel 03 Mean/Std_dev : 274.34 5.14 Card 00 Chip 01 Channel 04 Mean/Std_dev : 388.54 3.49 Card 00 Chip 01 Channel 05 Mean/Std_dev : 270.28 4.98 Card 00 Chip 01 Channel 06 Mean/Std_dev : 210.25 3.26 Card 00 Chip 01 Channel 07 Mean/Std_dev : 218.01 4.98 Card 00 Chip 01 Channel 08 Mean/Std_dev : 223.73 3.37 Card 00 Chip 01 Channel 09 Mean/Std_dev : 223.56 5.04 Card 00 Chip 01 Channel 10 Mean/Std_dev : 187.57 3.30 Card 00 Chip 01 Channel 11 Mean/Std_dev : 290.82 4.74 Card 00 Chip 01 Channel 12 Mean/Std_dev : 259.87 3.30 Card 00 Chip 01 Channel 13 Mean/Std_dev : 131.45 4.51 Card 00 Chip 01 Channel 14 Mean/Std_dev : 209.67 3.31 Card 00 Chip 01 Channel 15 Mean/Std_dev : 138.76 1.62 Card 00 Chip 01 Channel 16 Mean/Std_dev : 199.63 4.60 Card 00 Chip 01 Channel 17 Mean/Std_dev : 210.45 3.15 Card 00 Chip 01 Channel 18 Mean/Std_dev : 206.36 4.57 Card 00 Chip 01 Channel 19 Mean/Std_dev : 209.96 3.35 Card 00 Chip 01 Channel 20 Mean/Std_dev : 252.01 4.52 Card 00 Chip 01 Channel 21 Mean/Std_dev : 212.81 3.42 Card 00 Chip 01 Channel 22 Mean/Std_dev : 173.18 4.49 Card 00 Chip 01 Channel 23 Mean/Std_dev : 217.80 3.29 Card 00 Chip 01 Channel 24 Mean/Std_dev : 270.89 4.33 Card 00 Chip 01 Channel 25 Mean/Std_dev : 209.38 3.32 Card 00 Chip 01 Channel 26 Mean/Std_dev : 287.80 4.26 Card 00 Chip 01 Channel 27 Mean/Std_dev : 205.70 3.24 Card 00 Chip 01 Channel 28 Mean/Std_dev : 174.72 1.73 Card 00 Chip 01 Channel 29 Mean/Std_dev : 237.59 4.36 Card 00 Chip 01 Channel 30 Mean/Std_dev : 289.54 3.13 Card 00 Chip 01 Channel 31 Mean/Std_dev : 162.40 4.34 Card 00 Chip 01 Channel 32 Mean/Std_dev : 240.59 3.33 Card 00 Chip 01 Channel 33 Mean/Std_dev : 206.65 4.16 Card 00 Chip 01 Channel 34 Mean/Std_dev : 306.69 3.47 Card 00 Chip 01 Channel 35 Mean/Std_dev : 225.68 4.36 Card 00 Chip 01 Channel 36 Mean/Std_dev : 228.22 3.36 Card 00 Chip 01 Channel 37 Mean/Std_dev : 239.37 4.18 Card 00 Chip 01 Channel 38 Mean/Std_dev : 245.59 3.39 Card 00 Chip 01 Channel 39 Mean/Std_dev : 244.77 3.95 Card 00 Chip 01 Channel 40 Mean/Std_dev : 276.71 3.50 Card 00 Chip 01 Channel 41 Mean/Std_dev : 199.26 3.20 Card 00 Chip 01 Channel 42 Mean/Std_dev : 245.80 4.25 Card 00 Chip 01 Channel 43 Mean/Std_dev : 266.42 3.27 Card 00 Chip 01 Channel 44 Mean/Std_dev : 287.21 4.21 Card 00 Chip 01 Channel 45 Mean/Std_dev : 270.18 3.24 Card 00 Chip 01 Channel 46 Mean/Std_dev : 244.68 4.23 Card 00 Chip 01 Channel 47 Mean/Std_dev : 279.04 3.21 Card 00 Chip 01 Channel 48 Mean/Std_dev : 187.25 4.27 Card 00 Chip 01 Channel 49 Mean/Std_dev : 184.20 3.11 Card 00 Chip 01 Channel 50 Mean/Std_dev : 249.76 4.48 Card 00 Chip 01 Channel 51 Mean/Std_dev : 247.60 3.22 Card 00 Chip 01 Channel 52 Mean/Std_dev : 243.84 4.44 Card 00 Chip 01 Channel 53 Mean/Std_dev : 263.07 1.53 Card 00 Chip 01 Channel 54 Mean/Std_dev : 278.33 3.07 Card 00 Chip 01 Channel 55 Mean/Std_dev : 231.12 4.32 Card 00 Chip 01 Channel 56 Mean/Std_dev : 312.35 3.17 Card 00 Chip 01 Channel 57 Mean/Std_dev : 178.24 4.36 Card 00 Chip 01 Channel 58 Mean/Std_dev : 261.23 3.11 Card 00 Chip 01 Channel 59 Mean/Std_dev : 243.76 4.42 Card 00 Chip 01 Channel 60 Mean/Std_dev : 209.94 3.16 Card 00 Chip 01 Channel 61 Mean/Std_dev : 184.40 4.31 Card 00 Chip 01 Channel 62 Mean/Std_dev : 219.09 3.11 Card 00 Chip 01 Channel 63 Mean/Std_dev : 313.20 4.51 Card 00 Chip 01 Channel 64 Mean/Std_dev : 259.03 3.24 Card 00 Chip 01 Channel 65 Mean/Std_dev : 338.91 4.49 Card 00 Chip 01 Channel 66 Mean/Std_dev : 258.09 1.54 Card 00 Chip 01 Channel 67 Mean/Std_dev : 181.53 3.06 Card 00 Chip 01 Channel 68 Mean/Std_dev : 206.43 4.46 Card 00 Chip 01 Channel 69 Mean/Std_dev : 259.69 3.32 Card 00 Chip 01 Channel 70 Mean/Std_dev : 240.49 4.51 Card 00 Chip 01 Channel 71 Mean/Std_dev : 164.83 3.23 Card 00 Chip 01 Channel 72 Mean/Std_dev : 251.76 4.66 Card 00 Chip 01 Channel 73 Mean/Std_dev : 218.56 3.05 Card 00 Chip 01 Channel 74 Mean/Std_dev : 182.94 4.53 Card 00 Chip 01 Channel 75 Mean/Std_dev : 262.22 3.09 Card 00 Chip 01 Channel 76 Mean/Std_dev : 212.48 4.61 Card 00 Chip 01 Channel 77 Mean/Std_dev : 248.06 3.23 Card 00 Chip 01 Channel 78 Mean/Std_dev : 197.23 4.81 ----- End of Frame ----- srv(00).cmd(0): fe hped 2 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 02 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 02 Channel 01 Mean/Std_dev : 693.16 7.75 Card 00 Chip 02 Channel 02 Mean/Std_dev : 344.63 0.75 Card 00 Chip 02 Channel 03 Mean/Std_dev : 326.60 5.73 Card 00 Chip 02 Channel 04 Mean/Std_dev : 275.61 3.26 Card 00 Chip 02 Channel 05 Mean/Std_dev : 318.60 5.57 Card 00 Chip 02 Channel 06 Mean/Std_dev : 229.04 3.29 Card 00 Chip 02 Channel 07 Mean/Std_dev : 287.27 5.69 Card 00 Chip 02 Channel 08 Mean/Std_dev : 278.30 3.24 Card 00 Chip 02 Channel 09 Mean/Std_dev : 259.19 5.39 Card 00 Chip 02 Channel 10 Mean/Std_dev : 274.60 3.36 Card 00 Chip 02 Channel 11 Mean/Std_dev : 258.65 5.22 Card 00 Chip 02 Channel 12 Mean/Std_dev : 280.55 3.42 Card 00 Chip 02 Channel 13 Mean/Std_dev : 295.69 5.10 Card 00 Chip 02 Channel 14 Mean/Std_dev : 332.33 3.35 Card 00 Chip 02 Channel 15 Mean/Std_dev : 282.36 1.67 Card 00 Chip 02 Channel 16 Mean/Std_dev : 229.63 5.06 Card 00 Chip 02 Channel 17 Mean/Std_dev : 202.43 3.45 Card 00 Chip 02 Channel 18 Mean/Std_dev : 267.70 5.00 Card 00 Chip 02 Channel 19 Mean/Std_dev : 264.99 3.16 Card 00 Chip 02 Channel 20 Mean/Std_dev : 272.05 4.97 Card 00 Chip 02 Channel 21 Mean/Std_dev : 266.90 3.29 Card 00 Chip 02 Channel 22 Mean/Std_dev : 263.38 4.90 Card 00 Chip 02 Channel 23 Mean/Std_dev : 305.75 3.39 Card 00 Chip 02 Channel 24 Mean/Std_dev : 204.87 4.77 Card 00 Chip 02 Channel 25 Mean/Std_dev : 272.98 3.35 Card 00 Chip 02 Channel 26 Mean/Std_dev : 244.55 4.82 Card 00 Chip 02 Channel 27 Mean/Std_dev : 257.20 3.29 Card 00 Chip 02 Channel 28 Mean/Std_dev : 241.51 1.66 Card 00 Chip 02 Channel 29 Mean/Std_dev : 254.31 4.70 Card 00 Chip 02 Channel 30 Mean/Std_dev : 304.06 3.41 Card 00 Chip 02 Channel 31 Mean/Std_dev : 238.03 4.60 Card 00 Chip 02 Channel 32 Mean/Std_dev : 332.98 3.46 Card 00 Chip 02 Channel 33 Mean/Std_dev : 267.64 4.59 Card 00 Chip 02 Channel 34 Mean/Std_dev : 267.99 3.24 Card 00 Chip 02 Channel 35 Mean/Std_dev : 260.66 4.39 Card 00 Chip 02 Channel 36 Mean/Std_dev : 213.17 3.26 Card 00 Chip 02 Channel 37 Mean/Std_dev : 301.75 4.33 Card 00 Chip 02 Channel 38 Mean/Std_dev : 265.51 3.28 Card 00 Chip 02 Channel 39 Mean/Std_dev : 277.27 4.03 Card 00 Chip 02 Channel 40 Mean/Std_dev : 241.44 3.41 Card 00 Chip 02 Channel 41 Mean/Std_dev : 266.89 3.27 Card 00 Chip 02 Channel 42 Mean/Std_dev : 333.65 4.63 Card 00 Chip 02 Channel 43 Mean/Std_dev : 258.35 3.14 Card 00 Chip 02 Channel 44 Mean/Std_dev : 269.87 4.58 Card 00 Chip 02 Channel 45 Mean/Std_dev : 263.40 3.19 Card 00 Chip 02 Channel 46 Mean/Std_dev : 299.42 4.56 Card 00 Chip 02 Channel 47 Mean/Std_dev : 246.57 3.16 Card 00 Chip 02 Channel 48 Mean/Std_dev : 343.76 4.70 Card 00 Chip 02 Channel 49 Mean/Std_dev : 309.57 3.13 Card 00 Chip 02 Channel 50 Mean/Std_dev : 386.10 4.68 Card 00 Chip 02 Channel 51 Mean/Std_dev : 231.16 3.12 Card 00 Chip 02 Channel 52 Mean/Std_dev : 271.22 4.69 Card 00 Chip 02 Channel 53 Mean/Std_dev : 263.51 1.59 Card 00 Chip 02 Channel 54 Mean/Std_dev : 300.75 3.24 Card 00 Chip 02 Channel 55 Mean/Std_dev : 288.61 4.60 Card 00 Chip 02 Channel 56 Mean/Std_dev : 270.45 3.16 Card 00 Chip 02 Channel 57 Mean/Std_dev : 308.10 4.80 Card 00 Chip 02 Channel 58 Mean/Std_dev : 308.53 3.38 Card 00 Chip 02 Channel 59 Mean/Std_dev : 279.03 4.83 Card 00 Chip 02 Channel 60 Mean/Std_dev : 224.10 3.14 Card 00 Chip 02 Channel 61 Mean/Std_dev : 290.91 4.82 Card 00 Chip 02 Channel 62 Mean/Std_dev : 347.36 3.23 Card 00 Chip 02 Channel 63 Mean/Std_dev : 229.38 4.70 Card 00 Chip 02 Channel 64 Mean/Std_dev : 295.60 3.26 Card 00 Chip 02 Channel 65 Mean/Std_dev : 234.43 4.84 Card 00 Chip 02 Channel 66 Mean/Std_dev : 289.08 1.51 Card 00 Chip 02 Channel 67 Mean/Std_dev : 351.54 3.28 Card 00 Chip 02 Channel 68 Mean/Std_dev : 327.36 4.86 Card 00 Chip 02 Channel 69 Mean/Std_dev : 322.84 3.21 Card 00 Chip 02 Channel 70 Mean/Std_dev : 300.98 4.81 Card 00 Chip 02 Channel 71 Mean/Std_dev : 266.42 3.07 Card 00 Chip 02 Channel 72 Mean/Std_dev : 299.44 4.96 Card 00 Chip 02 Channel 73 Mean/Std_dev : 226.92 3.31 Card 00 Chip 02 Channel 74 Mean/Std_dev : 339.20 5.06 Card 00 Chip 02 Channel 75 Mean/Std_dev : 311.91 3.15 Card 00 Chip 02 Channel 76 Mean/Std_dev : 309.66 5.07 Card 00 Chip 02 Channel 77 Mean/Std_dev : 302.90 3.25 Card 00 Chip 02 Channel 78 Mean/Std_dev : 349.98 5.22 ----- End of Frame ----- srv(00).cmd(0): fe hped 3 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 03 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 03 Channel 01 Mean/Std_dev : 509.16 9.77 Card 00 Chip 03 Channel 02 Mean/Std_dev : 319.25 0.83 Card 00 Chip 03 Channel 03 Mean/Std_dev : 230.38 6.67 Card 00 Chip 03 Channel 04 Mean/Std_dev : 261.58 3.63 Card 00 Chip 03 Channel 05 Mean/Std_dev : 174.24 6.52 Card 00 Chip 03 Channel 06 Mean/Std_dev : 207.68 3.74 Card 00 Chip 03 Channel 07 Mean/Std_dev : 208.99 6.43 Card 00 Chip 03 Channel 08 Mean/Std_dev : 223.45 3.49 Card 00 Chip 03 Channel 09 Mean/Std_dev : 236.19 6.07 Card 00 Chip 03 Channel 10 Mean/Std_dev : 258.11 3.51 Card 00 Chip 03 Channel 11 Mean/Std_dev : 237.13 5.80 Card 00 Chip 03 Channel 12 Mean/Std_dev : 143.89 3.47 Card 00 Chip 03 Channel 13 Mean/Std_dev : 193.63 5.59 Card 00 Chip 03 Channel 14 Mean/Std_dev : 296.39 3.60 Card 00 Chip 03 Channel 15 Mean/Std_dev : 276.79 1.75 Card 00 Chip 03 Channel 16 Mean/Std_dev : 262.51 5.70 Card 00 Chip 03 Channel 17 Mean/Std_dev : 221.85 3.65 Card 00 Chip 03 Channel 18 Mean/Std_dev : 221.38 5.68 Card 00 Chip 03 Channel 19 Mean/Std_dev : 187.98 3.61 Card 00 Chip 03 Channel 20 Mean/Std_dev : 245.92 5.44 Card 00 Chip 03 Channel 21 Mean/Std_dev : 248.99 3.61 Card 00 Chip 03 Channel 22 Mean/Std_dev : 250.22 5.37 Card 00 Chip 03 Channel 23 Mean/Std_dev : 155.98 3.63 Card 00 Chip 03 Channel 24 Mean/Std_dev : 241.72 5.44 Card 00 Chip 03 Channel 25 Mean/Std_dev : 278.49 3.50 Card 00 Chip 03 Channel 26 Mean/Std_dev : 278.06 5.14 Card 00 Chip 03 Channel 27 Mean/Std_dev : 306.27 3.47 Card 00 Chip 03 Channel 28 Mean/Std_dev : 207.00 1.86 Card 00 Chip 03 Channel 29 Mean/Std_dev : 201.63 5.38 Card 00 Chip 03 Channel 30 Mean/Std_dev : 237.49 3.49 Card 00 Chip 03 Channel 31 Mean/Std_dev : 141.16 5.19 Card 00 Chip 03 Channel 32 Mean/Std_dev : 226.27 3.65 Card 00 Chip 03 Channel 33 Mean/Std_dev : 278.31 5.01 Card 00 Chip 03 Channel 34 Mean/Std_dev : 223.74 3.44 Card 00 Chip 03 Channel 35 Mean/Std_dev : 252.04 4.98 Card 00 Chip 03 Channel 36 Mean/Std_dev : 246.98 3.48 Card 00 Chip 03 Channel 37 Mean/Std_dev : 259.17 4.88 Card 00 Chip 03 Channel 38 Mean/Std_dev : 212.34 3.48 Card 00 Chip 03 Channel 39 Mean/Std_dev : 227.29 4.45 Card 00 Chip 03 Channel 40 Mean/Std_dev : 261.80 3.53 Card 00 Chip 03 Channel 41 Mean/Std_dev : 222.73 3.54 Card 00 Chip 03 Channel 42 Mean/Std_dev : 244.52 5.30 Card 00 Chip 03 Channel 43 Mean/Std_dev : 227.59 3.62 Card 00 Chip 03 Channel 44 Mean/Std_dev : 212.86 5.24 Card 00 Chip 03 Channel 45 Mean/Std_dev : 185.65 3.53 Card 00 Chip 03 Channel 46 Mean/Std_dev : 222.24 5.47 Card 00 Chip 03 Channel 47 Mean/Std_dev : 164.90 3.39 Card 00 Chip 03 Channel 48 Mean/Std_dev : 314.75 5.47 Card 00 Chip 03 Channel 49 Mean/Std_dev : 278.75 3.32 Card 00 Chip 03 Channel 50 Mean/Std_dev : 198.11 5.25 Card 00 Chip 03 Channel 51 Mean/Std_dev : 312.31 3.50 Card 00 Chip 03 Channel 52 Mean/Std_dev : 257.91 5.43 Card 00 Chip 03 Channel 53 Mean/Std_dev : 269.32 1.55 Card 00 Chip 03 Channel 54 Mean/Std_dev : 197.60 3.54 Card 00 Chip 03 Channel 55 Mean/Std_dev : 224.01 5.55 Card 00 Chip 03 Channel 56 Mean/Std_dev : 208.61 3.48 Card 00 Chip 03 Channel 57 Mean/Std_dev : 239.37 5.36 Card 00 Chip 03 Channel 58 Mean/Std_dev : 189.70 3.59 Card 00 Chip 03 Channel 59 Mean/Std_dev : 252.53 5.50 Card 00 Chip 03 Channel 60 Mean/Std_dev : 201.11 3.36 Card 00 Chip 03 Channel 61 Mean/Std_dev : 256.07 5.38 Card 00 Chip 03 Channel 62 Mean/Std_dev : 250.39 3.35 Card 00 Chip 03 Channel 63 Mean/Std_dev : 271.97 5.46 Card 00 Chip 03 Channel 64 Mean/Std_dev : 221.52 3.45 Card 00 Chip 03 Channel 65 Mean/Std_dev : 211.24 5.61 Card 00 Chip 03 Channel 66 Mean/Std_dev : 153.58 1.61 Card 00 Chip 03 Channel 67 Mean/Std_dev : 256.65 3.39 Card 00 Chip 03 Channel 68 Mean/Std_dev : 234.47 5.52 Card 00 Chip 03 Channel 69 Mean/Std_dev : 230.02 3.35 Card 00 Chip 03 Channel 70 Mean/Std_dev : 256.67 5.70 Card 00 Chip 03 Channel 71 Mean/Std_dev : 134.01 3.36 Card 00 Chip 03 Channel 72 Mean/Std_dev : 238.94 5.61 Card 00 Chip 03 Channel 73 Mean/Std_dev : 210.46 3.48 Card 00 Chip 03 Channel 74 Mean/Std_dev : 337.97 5.72 Card 00 Chip 03 Channel 75 Mean/Std_dev : 166.30 3.47 Card 00 Chip 03 Channel 76 Mean/Std_dev : 236.10 5.83 Card 00 Chip 03 Channel 77 Mean/Std_dev : 285.39 3.52 Card 00 Chip 03 Channel 78 Mean/Std_dev : 239.25 5.92 ----- End of Frame ----- srv(00).cmd(0): fe hped 4 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 04 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 04 Channel 01 Mean/Std_dev : 706.15 5.82 Card 00 Chip 04 Channel 02 Mean/Std_dev : 279.84 0.70 Card 00 Chip 04 Channel 03 Mean/Std_dev : 241.02 4.86 Card 00 Chip 04 Channel 04 Mean/Std_dev : 149.77 3.60 Card 00 Chip 04 Channel 05 Mean/Std_dev : 139.38 4.70 Card 00 Chip 04 Channel 06 Mean/Std_dev : 181.98 3.52 Card 00 Chip 04 Channel 07 Mean/Std_dev : 234.97 4.58 Card 00 Chip 04 Channel 08 Mean/Std_dev : 185.95 3.50 Card 00 Chip 04 Channel 09 Mean/Std_dev : 250.52 4.53 Card 00 Chip 04 Channel 10 Mean/Std_dev : 162.53 3.57 Card 00 Chip 04 Channel 11 Mean/Std_dev : 196.29 4.59 Card 00 Chip 04 Channel 12 Mean/Std_dev : 154.61 3.42 Card 00 Chip 04 Channel 13 Mean/Std_dev : 170.93 4.40 Card 00 Chip 04 Channel 14 Mean/Std_dev : 191.94 3.61 Card 00 Chip 04 Channel 15 Mean/Std_dev : 115.87 1.74 Card 00 Chip 04 Channel 16 Mean/Std_dev : 289.57 4.44 Card 00 Chip 04 Channel 17 Mean/Std_dev : 188.30 3.38 Card 00 Chip 04 Channel 18 Mean/Std_dev : 253.41 4.21 Card 00 Chip 04 Channel 19 Mean/Std_dev : 175.99 3.55 Card 00 Chip 04 Channel 20 Mean/Std_dev : 195.06 4.34 Card 00 Chip 04 Channel 21 Mean/Std_dev : 216.59 3.50 Card 00 Chip 04 Channel 22 Mean/Std_dev : 135.25 4.30 Card 00 Chip 04 Channel 23 Mean/Std_dev : 237.09 3.48 Card 00 Chip 04 Channel 24 Mean/Std_dev : 213.29 4.48 Card 00 Chip 04 Channel 25 Mean/Std_dev : 244.14 3.62 Card 00 Chip 04 Channel 26 Mean/Std_dev : 125.95 4.21 Card 00 Chip 04 Channel 27 Mean/Std_dev : 216.48 3.44 Card 00 Chip 04 Channel 28 Mean/Std_dev : 180.68 1.82 Card 00 Chip 04 Channel 29 Mean/Std_dev : 181.53 4.19 Card 00 Chip 04 Channel 30 Mean/Std_dev : 195.45 3.49 Card 00 Chip 04 Channel 31 Mean/Std_dev : 196.26 4.18 Card 00 Chip 04 Channel 32 Mean/Std_dev : 201.53 3.50 Card 00 Chip 04 Channel 33 Mean/Std_dev : 139.61 4.13 Card 00 Chip 04 Channel 34 Mean/Std_dev : 162.19 3.43 Card 00 Chip 04 Channel 35 Mean/Std_dev : 216.92 4.14 Card 00 Chip 04 Channel 36 Mean/Std_dev : 157.19 3.50 Card 00 Chip 04 Channel 37 Mean/Std_dev : 246.18 4.14 Card 00 Chip 04 Channel 38 Mean/Std_dev : 234.63 3.41 Card 00 Chip 04 Channel 39 Mean/Std_dev : 129.69 3.92 Card 00 Chip 04 Channel 40 Mean/Std_dev : 231.07 3.59 Card 00 Chip 04 Channel 41 Mean/Std_dev : 211.32 3.06 Card 00 Chip 04 Channel 42 Mean/Std_dev : 219.97 4.07 Card 00 Chip 04 Channel 43 Mean/Std_dev : 273.49 3.03 Card 00 Chip 04 Channel 44 Mean/Std_dev : 196.14 4.30 Card 00 Chip 04 Channel 45 Mean/Std_dev : 144.76 3.20 Card 00 Chip 04 Channel 46 Mean/Std_dev : 199.85 4.25 Card 00 Chip 04 Channel 47 Mean/Std_dev : 143.54 3.23 Card 00 Chip 04 Channel 48 Mean/Std_dev : 196.79 4.21 Card 00 Chip 04 Channel 49 Mean/Std_dev : 136.92 3.26 Card 00 Chip 04 Channel 50 Mean/Std_dev : 208.50 4.12 Card 00 Chip 04 Channel 51 Mean/Std_dev : 224.12 3.35 Card 00 Chip 04 Channel 52 Mean/Std_dev : 137.19 4.31 Card 00 Chip 04 Channel 53 Mean/Std_dev : 275.28 1.54 Card 00 Chip 04 Channel 54 Mean/Std_dev : 196.52 3.20 Card 00 Chip 04 Channel 55 Mean/Std_dev : 206.59 4.32 Card 00 Chip 04 Channel 56 Mean/Std_dev : 174.56 3.19 Card 00 Chip 04 Channel 57 Mean/Std_dev : 206.34 4.25 Card 00 Chip 04 Channel 58 Mean/Std_dev : 96.32 3.18 Card 00 Chip 04 Channel 59 Mean/Std_dev : 210.15 4.34 Card 00 Chip 04 Channel 60 Mean/Std_dev : 252.64 3.17 Card 00 Chip 04 Channel 61 Mean/Std_dev : 185.71 4.35 Card 00 Chip 04 Channel 62 Mean/Std_dev : 66.94 3.23 Card 00 Chip 04 Channel 63 Mean/Std_dev : 158.54 4.39 Card 00 Chip 04 Channel 64 Mean/Std_dev : 119.78 3.17 Card 00 Chip 04 Channel 65 Mean/Std_dev : 218.76 4.37 Card 00 Chip 04 Channel 66 Mean/Std_dev : 119.42 1.50 Card 00 Chip 04 Channel 67 Mean/Std_dev : 145.82 3.14 Card 00 Chip 04 Channel 68 Mean/Std_dev : 186.92 4.44 Card 00 Chip 04 Channel 69 Mean/Std_dev : 190.91 3.24 Card 00 Chip 04 Channel 70 Mean/Std_dev : 140.80 4.44 Card 00 Chip 04 Channel 71 Mean/Std_dev : 194.35 3.14 Card 00 Chip 04 Channel 72 Mean/Std_dev : 210.61 4.67 Card 00 Chip 04 Channel 73 Mean/Std_dev : 209.42 3.27 Card 00 Chip 04 Channel 74 Mean/Std_dev : 210.42 4.68 Card 00 Chip 04 Channel 75 Mean/Std_dev : 134.61 3.31 Card 00 Chip 04 Channel 76 Mean/Std_dev : 171.35 4.68 Card 00 Chip 04 Channel 77 Mean/Std_dev : 232.99 3.26 Card 00 Chip 04 Channel 78 Mean/Std_dev : 85.43 4.79 ----- End of Frame ----- srv(00).cmd(0): fe hped 5 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 05 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 05 Channel 01 Mean/Std_dev : 714.66 7.89 Card 00 Chip 05 Channel 02 Mean/Std_dev : 287.67 0.76 Card 00 Chip 05 Channel 03 Mean/Std_dev : 307.09 5.31 Card 00 Chip 05 Channel 04 Mean/Std_dev : 234.24 3.45 Card 00 Chip 05 Channel 05 Mean/Std_dev : 209.66 4.92 Card 00 Chip 05 Channel 06 Mean/Std_dev : 170.67 3.53 Card 00 Chip 05 Channel 07 Mean/Std_dev : 211.70 4.80 Card 00 Chip 05 Channel 08 Mean/Std_dev : 216.08 3.50 Card 00 Chip 05 Channel 09 Mean/Std_dev : 264.99 4.82 Card 00 Chip 05 Channel 10 Mean/Std_dev : 153.73 3.42 Card 00 Chip 05 Channel 11 Mean/Std_dev : 275.33 4.77 Card 00 Chip 05 Channel 12 Mean/Std_dev : 176.94 3.51 Card 00 Chip 05 Channel 13 Mean/Std_dev : 92.31 4.62 Card 00 Chip 05 Channel 14 Mean/Std_dev : 225.36 3.45 Card 00 Chip 05 Channel 15 Mean/Std_dev : 251.95 1.64 Card 00 Chip 05 Channel 16 Mean/Std_dev : 222.89 4.63 Card 00 Chip 05 Channel 17 Mean/Std_dev : 266.35 3.42 Card 00 Chip 05 Channel 18 Mean/Std_dev : 114.33 4.66 Card 00 Chip 05 Channel 19 Mean/Std_dev : 233.95 3.52 Card 00 Chip 05 Channel 20 Mean/Std_dev : 217.08 4.53 Card 00 Chip 05 Channel 21 Mean/Std_dev : 205.44 3.51 Card 00 Chip 05 Channel 22 Mean/Std_dev : 253.16 4.41 Card 00 Chip 05 Channel 23 Mean/Std_dev : 191.52 3.46 Card 00 Chip 05 Channel 24 Mean/Std_dev : 189.26 4.63 Card 00 Chip 05 Channel 25 Mean/Std_dev : 130.04 3.47 Card 00 Chip 05 Channel 26 Mean/Std_dev : 159.48 4.52 Card 00 Chip 05 Channel 27 Mean/Std_dev : 241.87 3.54 Card 00 Chip 05 Channel 28 Mean/Std_dev : 191.96 1.81 Card 00 Chip 05 Channel 29 Mean/Std_dev : 161.92 4.43 Card 00 Chip 05 Channel 30 Mean/Std_dev : 155.62 3.51 Card 00 Chip 05 Channel 31 Mean/Std_dev : 271.65 4.40 Card 00 Chip 05 Channel 32 Mean/Std_dev : 125.54 3.62 Card 00 Chip 05 Channel 33 Mean/Std_dev : 241.13 4.44 Card 00 Chip 05 Channel 34 Mean/Std_dev : 199.12 3.52 Card 00 Chip 05 Channel 35 Mean/Std_dev : 207.31 4.36 Card 00 Chip 05 Channel 36 Mean/Std_dev : 158.04 3.54 Card 00 Chip 05 Channel 37 Mean/Std_dev : 175.42 4.29 Card 00 Chip 05 Channel 38 Mean/Std_dev : 162.79 3.64 Card 00 Chip 05 Channel 39 Mean/Std_dev : 184.63 4.00 Card 00 Chip 05 Channel 40 Mean/Std_dev : 221.08 3.51 Card 00 Chip 05 Channel 41 Mean/Std_dev : 249.46 3.29 Card 00 Chip 05 Channel 42 Mean/Std_dev : 245.61 4.58 Card 00 Chip 05 Channel 43 Mean/Std_dev : 149.22 3.28 Card 00 Chip 05 Channel 44 Mean/Std_dev : 155.75 4.56 Card 00 Chip 05 Channel 45 Mean/Std_dev : 170.98 3.28 Card 00 Chip 05 Channel 46 Mean/Std_dev : 128.12 4.55 Card 00 Chip 05 Channel 47 Mean/Std_dev : 178.80 3.18 Card 00 Chip 05 Channel 48 Mean/Std_dev : 239.10 4.51 Card 00 Chip 05 Channel 49 Mean/Std_dev : 224.02 3.41 Card 00 Chip 05 Channel 50 Mean/Std_dev : 199.22 4.73 Card 00 Chip 05 Channel 51 Mean/Std_dev : 247.28 3.19 Card 00 Chip 05 Channel 52 Mean/Std_dev : 132.44 4.56 Card 00 Chip 05 Channel 53 Mean/Std_dev : 191.67 1.57 Card 00 Chip 05 Channel 54 Mean/Std_dev : 139.33 3.28 Card 00 Chip 05 Channel 55 Mean/Std_dev : 143.01 4.61 Card 00 Chip 05 Channel 56 Mean/Std_dev : 122.28 3.29 Card 00 Chip 05 Channel 57 Mean/Std_dev : 190.61 4.58 Card 00 Chip 05 Channel 58 Mean/Std_dev : 177.30 3.41 Card 00 Chip 05 Channel 59 Mean/Std_dev : 181.38 4.69 Card 00 Chip 05 Channel 60 Mean/Std_dev : 199.73 3.24 Card 00 Chip 05 Channel 61 Mean/Std_dev : 288.67 4.95 Card 00 Chip 05 Channel 62 Mean/Std_dev : 199.41 3.28 Card 00 Chip 05 Channel 63 Mean/Std_dev : 274.44 4.79 Card 00 Chip 05 Channel 64 Mean/Std_dev : 172.88 3.35 Card 00 Chip 05 Channel 65 Mean/Std_dev : 235.43 4.79 Card 00 Chip 05 Channel 66 Mean/Std_dev : 175.00 1.57 Card 00 Chip 05 Channel 67 Mean/Std_dev : 189.58 3.29 Card 00 Chip 05 Channel 68 Mean/Std_dev : 224.04 4.81 Card 00 Chip 05 Channel 69 Mean/Std_dev : 204.34 3.29 Card 00 Chip 05 Channel 70 Mean/Std_dev : 147.34 4.93 Card 00 Chip 05 Channel 71 Mean/Std_dev : 203.46 3.25 Card 00 Chip 05 Channel 72 Mean/Std_dev : 207.43 4.86 Card 00 Chip 05 Channel 73 Mean/Std_dev : 190.31 3.39 Card 00 Chip 05 Channel 74 Mean/Std_dev : 259.60 5.01 Card 00 Chip 05 Channel 75 Mean/Std_dev : 203.20 3.33 Card 00 Chip 05 Channel 76 Mean/Std_dev : 198.68 5.30 Card 00 Chip 05 Channel 77 Mean/Std_dev : 163.84 3.18 Card 00 Chip 05 Channel 78 Mean/Std_dev : 223.18 5.12 ----- End of Frame ----- srv(00).cmd(0): fe hped 6 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 06 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 06 Channel 01 Mean/Std_dev : 684.28 7.42 Card 00 Chip 06 Channel 02 Mean/Std_dev : 341.01 1.39 Card 00 Chip 06 Channel 03 Mean/Std_dev : 302.86 5.52 Card 00 Chip 06 Channel 04 Mean/Std_dev : 221.52 3.59 Card 00 Chip 06 Channel 05 Mean/Std_dev : 193.23 5.30 Card 00 Chip 06 Channel 06 Mean/Std_dev : 243.94 3.62 Card 00 Chip 06 Channel 07 Mean/Std_dev : 256.13 5.01 Card 00 Chip 06 Channel 08 Mean/Std_dev : 230.91 3.76 Card 00 Chip 06 Channel 09 Mean/Std_dev : 323.92 5.05 Card 00 Chip 06 Channel 10 Mean/Std_dev : 296.45 3.59 Card 00 Chip 06 Channel 11 Mean/Std_dev : 260.11 5.05 Card 00 Chip 06 Channel 12 Mean/Std_dev : 301.65 3.64 Card 00 Chip 06 Channel 13 Mean/Std_dev : 198.54 4.93 Card 00 Chip 06 Channel 14 Mean/Std_dev : 195.41 3.50 Card 00 Chip 06 Channel 15 Mean/Std_dev : 220.99 1.97 Card 00 Chip 06 Channel 16 Mean/Std_dev : 275.73 4.79 Card 00 Chip 06 Channel 17 Mean/Std_dev : 285.22 3.81 Card 00 Chip 06 Channel 18 Mean/Std_dev : 274.03 4.79 Card 00 Chip 06 Channel 19 Mean/Std_dev : 187.41 3.57 Card 00 Chip 06 Channel 20 Mean/Std_dev : 185.90 4.59 Card 00 Chip 06 Channel 21 Mean/Std_dev : 254.27 3.60 Card 00 Chip 06 Channel 22 Mean/Std_dev : 246.78 4.74 Card 00 Chip 06 Channel 23 Mean/Std_dev : 207.01 3.32 Card 00 Chip 06 Channel 24 Mean/Std_dev : 238.42 4.56 Card 00 Chip 06 Channel 25 Mean/Std_dev : 276.31 3.58 Card 00 Chip 06 Channel 26 Mean/Std_dev : 192.07 4.77 Card 00 Chip 06 Channel 27 Mean/Std_dev : 298.61 3.54 Card 00 Chip 06 Channel 28 Mean/Std_dev : 325.01 1.92 Card 00 Chip 06 Channel 29 Mean/Std_dev : 292.48 4.58 Card 00 Chip 06 Channel 30 Mean/Std_dev : 231.98 3.59 Card 00 Chip 06 Channel 31 Mean/Std_dev : 243.72 4.72 Card 00 Chip 06 Channel 32 Mean/Std_dev : 279.45 3.36 Card 00 Chip 06 Channel 33 Mean/Std_dev : 273.44 4.68 Card 00 Chip 06 Channel 34 Mean/Std_dev : 291.23 3.40 Card 00 Chip 06 Channel 35 Mean/Std_dev : 190.95 4.54 Card 00 Chip 06 Channel 36 Mean/Std_dev : 274.66 3.60 Card 00 Chip 06 Channel 37 Mean/Std_dev : 356.54 4.49 Card 00 Chip 06 Channel 38 Mean/Std_dev : 278.16 3.60 Card 00 Chip 06 Channel 39 Mean/Std_dev : 326.47 4.10 Card 00 Chip 06 Channel 40 Mean/Std_dev : 313.00 3.60 Card 00 Chip 06 Channel 41 Mean/Std_dev : 368.52 3.41 Card 00 Chip 06 Channel 42 Mean/Std_dev : 254.24 4.93 Card 00 Chip 06 Channel 43 Mean/Std_dev : 260.17 3.40 Card 00 Chip 06 Channel 44 Mean/Std_dev : 306.20 4.98 Card 00 Chip 06 Channel 45 Mean/Std_dev : 281.58 3.34 Card 00 Chip 06 Channel 46 Mean/Std_dev : 282.80 5.00 Card 00 Chip 06 Channel 47 Mean/Std_dev : 238.15 3.52 Card 00 Chip 06 Channel 48 Mean/Std_dev : 280.46 4.90 Card 00 Chip 06 Channel 49 Mean/Std_dev : 275.94 3.19 Card 00 Chip 06 Channel 50 Mean/Std_dev : 299.16 4.91 Card 00 Chip 06 Channel 51 Mean/Std_dev : 339.13 3.48 Card 00 Chip 06 Channel 52 Mean/Std_dev : 226.64 4.87 Card 00 Chip 06 Channel 53 Mean/Std_dev : 234.35 1.82 Card 00 Chip 06 Channel 54 Mean/Std_dev : 250.58 3.35 Card 00 Chip 06 Channel 55 Mean/Std_dev : 369.44 5.02 Card 00 Chip 06 Channel 56 Mean/Std_dev : 217.21 3.41 Card 00 Chip 06 Channel 57 Mean/Std_dev : 190.89 4.99 Card 00 Chip 06 Channel 58 Mean/Std_dev : 193.73 3.35 Card 00 Chip 06 Channel 59 Mean/Std_dev : 289.80 4.96 Card 00 Chip 06 Channel 60 Mean/Std_dev : 261.17 3.35 Card 00 Chip 06 Channel 61 Mean/Std_dev : 289.45 5.10 Card 00 Chip 06 Channel 62 Mean/Std_dev : 276.98 3.43 Card 00 Chip 06 Channel 63 Mean/Std_dev : 237.52 5.11 Card 00 Chip 06 Channel 64 Mean/Std_dev : 256.83 3.36 Card 00 Chip 06 Channel 65 Mean/Std_dev : 281.72 5.19 Card 00 Chip 06 Channel 66 Mean/Std_dev : 249.08 1.78 Card 00 Chip 06 Channel 67 Mean/Std_dev : 238.35 3.38 Card 00 Chip 06 Channel 68 Mean/Std_dev : 296.14 5.32 Card 00 Chip 06 Channel 69 Mean/Std_dev : 261.78 3.38 Card 00 Chip 06 Channel 70 Mean/Std_dev : 232.65 5.38 Card 00 Chip 06 Channel 71 Mean/Std_dev : 278.17 3.45 Card 00 Chip 06 Channel 72 Mean/Std_dev : 235.96 5.24 Card 00 Chip 06 Channel 73 Mean/Std_dev : 266.84 3.63 Card 00 Chip 06 Channel 74 Mean/Std_dev : 243.33 5.26 Card 00 Chip 06 Channel 75 Mean/Std_dev : 245.65 3.47 Card 00 Chip 06 Channel 76 Mean/Std_dev : 246.97 5.48 Card 00 Chip 06 Channel 77 Mean/Std_dev : 295.81 3.36 Card 00 Chip 06 Channel 78 Mean/Std_dev : 246.61 5.68 ----- End of Frame ----- srv(00).cmd(0): fe hped 7 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 07 Channel 00 Mean/Std_dev : 0.00 0.00 Card 00 Chip 07 Channel 01 Mean/Std_dev : 664.52 8.64 Card 00 Chip 07 Channel 02 Mean/Std_dev : 338.76 0.77 Card 00 Chip 07 Channel 03 Mean/Std_dev : 284.30 6.01 Card 00 Chip 07 Channel 04 Mean/Std_dev : 241.04 3.83 Card 00 Chip 07 Channel 05 Mean/Std_dev : 255.29 5.65 Card 00 Chip 07 Channel 06 Mean/Std_dev : 224.56 3.70 Card 00 Chip 07 Channel 07 Mean/Std_dev : 268.66 5.46 Card 00 Chip 07 Channel 08 Mean/Std_dev : 313.02 3.66 Card 00 Chip 07 Channel 09 Mean/Std_dev : 288.83 5.44 Card 00 Chip 07 Channel 10 Mean/Std_dev : 214.21 3.56 Card 00 Chip 07 Channel 11 Mean/Std_dev : 234.28 5.37 Card 00 Chip 07 Channel 12 Mean/Std_dev : 292.94 3.52 Card 00 Chip 07 Channel 13 Mean/Std_dev : 273.58 5.42 Card 00 Chip 07 Channel 14 Mean/Std_dev : 228.69 3.56 Card 00 Chip 07 Channel 15 Mean/Std_dev : 223.73 1.69 Card 00 Chip 07 Channel 16 Mean/Std_dev : 251.61 5.36 Card 00 Chip 07 Channel 17 Mean/Std_dev : 183.44 3.67 Card 00 Chip 07 Channel 18 Mean/Std_dev : 294.19 5.37 Card 00 Chip 07 Channel 19 Mean/Std_dev : 218.34 3.55 Card 00 Chip 07 Channel 20 Mean/Std_dev : 250.66 5.29 Card 00 Chip 07 Channel 21 Mean/Std_dev : 248.86 3.58 Card 00 Chip 07 Channel 22 Mean/Std_dev : 298.48 5.21 Card 00 Chip 07 Channel 23 Mean/Std_dev : 259.99 3.48 Card 00 Chip 07 Channel 24 Mean/Std_dev : 240.51 5.19 Card 00 Chip 07 Channel 25 Mean/Std_dev : 269.55 3.68 Card 00 Chip 07 Channel 26 Mean/Std_dev : 286.74 5.09 Card 00 Chip 07 Channel 27 Mean/Std_dev : 242.69 3.67 Card 00 Chip 07 Channel 28 Mean/Std_dev : 316.75 1.72 Card 00 Chip 07 Channel 29 Mean/Std_dev : 271.32 5.08 Card 00 Chip 07 Channel 30 Mean/Std_dev : 179.05 3.71 Card 00 Chip 07 Channel 31 Mean/Std_dev : 186.26 5.06 Card 00 Chip 07 Channel 32 Mean/Std_dev : 212.51 3.80 Card 00 Chip 07 Channel 33 Mean/Std_dev : 292.62 4.96 Card 00 Chip 07 Channel 34 Mean/Std_dev : 252.20 3.91 Card 00 Chip 07 Channel 35 Mean/Std_dev : 260.96 4.88 Card 00 Chip 07 Channel 36 Mean/Std_dev : 258.30 3.62 Card 00 Chip 07 Channel 37 Mean/Std_dev : 240.50 4.89 Card 00 Chip 07 Channel 38 Mean/Std_dev : 279.12 3.59 Card 00 Chip 07 Channel 39 Mean/Std_dev : 215.38 4.56 Card 00 Chip 07 Channel 40 Mean/Std_dev : 322.68 3.72 Card 00 Chip 07 Channel 41 Mean/Std_dev : 197.83 3.25 Card 00 Chip 07 Channel 42 Mean/Std_dev : 278.84 5.42 Card 00 Chip 07 Channel 43 Mean/Std_dev : 245.14 3.28 Card 00 Chip 07 Channel 44 Mean/Std_dev : 331.14 5.42 Card 00 Chip 07 Channel 45 Mean/Std_dev : 312.49 3.48 Card 00 Chip 07 Channel 46 Mean/Std_dev : 274.34 5.41 Card 00 Chip 07 Channel 47 Mean/Std_dev : 270.69 3.36 Card 00 Chip 07 Channel 48 Mean/Std_dev : 210.99 5.26 Card 00 Chip 07 Channel 49 Mean/Std_dev : 255.04 3.18 Card 00 Chip 07 Channel 50 Mean/Std_dev : 286.22 5.26 Card 00 Chip 07 Channel 51 Mean/Std_dev : 249.23 3.45 Card 00 Chip 07 Channel 52 Mean/Std_dev : 254.80 5.48 Card 00 Chip 07 Channel 53 Mean/Std_dev : 328.85 1.42 Card 00 Chip 07 Channel 54 Mean/Std_dev : 328.25 3.37 Card 00 Chip 07 Channel 55 Mean/Std_dev : 285.97 5.50 Card 00 Chip 07 Channel 56 Mean/Std_dev : 285.41 3.33 Card 00 Chip 07 Channel 57 Mean/Std_dev : 222.52 5.42 Card 00 Chip 07 Channel 58 Mean/Std_dev : 300.21 3.34 Card 00 Chip 07 Channel 59 Mean/Std_dev : 237.71 5.62 Card 00 Chip 07 Channel 60 Mean/Std_dev : 271.72 3.45 Card 00 Chip 07 Channel 61 Mean/Std_dev : 279.11 5.59 Card 00 Chip 07 Channel 62 Mean/Std_dev : 280.33 3.38 Card 00 Chip 07 Channel 63 Mean/Std_dev : 240.66 5.71 Card 00 Chip 07 Channel 64 Mean/Std_dev : 315.25 3.52 Card 00 Chip 07 Channel 65 Mean/Std_dev : 301.83 5.61 Card 00 Chip 07 Channel 66 Mean/Std_dev : 241.15 1.43 Card 00 Chip 07 Channel 67 Mean/Std_dev : 174.77 3.41 Card 00 Chip 07 Channel 68 Mean/Std_dev : 328.66 5.78 Card 00 Chip 07 Channel 69 Mean/Std_dev : 266.83 3.39 Card 00 Chip 07 Channel 70 Mean/Std_dev : 230.19 5.73 Card 00 Chip 07 Channel 71 Mean/Std_dev : 232.51 3.51 Card 00 Chip 07 Channel 72 Mean/Std_dev : 248.04 5.78 Card 00 Chip 07 Channel 73 Mean/Std_dev : 146.35 3.43 Card 00 Chip 07 Channel 74 Mean/Std_dev : 268.74 5.97 Card 00 Chip 07 Channel 75 Mean/Std_dev : 155.80 3.59 Card 00 Chip 07 Channel 76 Mean/Std_dev : 272.08 5.99 Card 00 Chip 07 Channel 77 Mean/Std_dev : 239.02 3.34 Card 00 Chip 07 Channel 78 Mean/Std_dev : 289.76 6.16 ----- End of Frame ----- srv(00).cmd(0): fe hped 0:15 * centermean 250 0 Tdcm(0) Fem(00): hped centermean done on 1264 histograms. Underflow: 8 Overflow: 0 ped: 250 srv(00).cmd(0): fe subtract_ped 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x4000 srv(00).cmd(0): fe zero_suppress 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe hped 0:15 * clr 0 Tdcm(0) Fem(00): hped clr done on 1264 histograms. Underflow: 0 Overflow: 0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be state pa 1 0 Tdcm(0): PedestalAccumulatorState <- 1 srv(00).cmd(0): be trig_ena 1 0 Tdcm(0) Reg(6) <- 0x1000 srv(00).cmd(0): be state pa 0 Tdcm(0): PedestalAccumulatorState= 1 (Busy) 0 Tdcm(0): PedestalAccumulatorState= 0 (Standby) srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): fe hped 0 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 00 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 00 Channel 01 Mean/Std_dev : 409.38 7.61 Card 00 Chip 00 Channel 02 Mean/Std_dev : 249.45 0.66 Card 00 Chip 00 Channel 03 Mean/Std_dev : 249.31 4.93 Card 00 Chip 00 Channel 04 Mean/Std_dev : 248.80 3.40 Card 00 Chip 00 Channel 05 Mean/Std_dev : 250.37 4.76 Card 00 Chip 00 Channel 06 Mean/Std_dev : 249.15 3.20 Card 00 Chip 00 Channel 07 Mean/Std_dev : 249.59 4.71 Card 00 Chip 00 Channel 08 Mean/Std_dev : 250.39 3.25 Card 00 Chip 00 Channel 09 Mean/Std_dev : 250.19 4.66 Card 00 Chip 00 Channel 10 Mean/Std_dev : 249.66 3.31 Card 00 Chip 00 Channel 11 Mean/Std_dev : 249.86 4.58 Card 00 Chip 00 Channel 12 Mean/Std_dev : 249.89 3.31 Card 00 Chip 00 Channel 13 Mean/Std_dev : 250.01 4.42 Card 00 Chip 00 Channel 14 Mean/Std_dev : 249.04 3.34 Card 00 Chip 00 Channel 15 Mean/Std_dev : 249.82 1.59 Card 00 Chip 00 Channel 16 Mean/Std_dev : 249.78 4.43 Card 00 Chip 00 Channel 17 Mean/Std_dev : 248.95 3.22 Card 00 Chip 00 Channel 18 Mean/Std_dev : 250.21 4.22 Card 00 Chip 00 Channel 19 Mean/Std_dev : 248.85 3.25 Card 00 Chip 00 Channel 20 Mean/Std_dev : 249.26 4.28 Card 00 Chip 00 Channel 21 Mean/Std_dev : 249.71 3.22 Card 00 Chip 00 Channel 22 Mean/Std_dev : 249.53 4.25 Card 00 Chip 00 Channel 23 Mean/Std_dev : 249.00 3.21 Card 00 Chip 00 Channel 24 Mean/Std_dev : 250.12 4.21 Card 00 Chip 00 Channel 25 Mean/Std_dev : 250.33 3.21 Card 00 Chip 00 Channel 26 Mean/Std_dev : 250.42 4.23 Card 00 Chip 00 Channel 27 Mean/Std_dev : 248.67 3.17 Card 00 Chip 00 Channel 28 Mean/Std_dev : 249.22 1.70 Card 00 Chip 00 Channel 29 Mean/Std_dev : 249.25 4.13 Card 00 Chip 00 Channel 30 Mean/Std_dev : 249.65 3.27 Card 00 Chip 00 Channel 31 Mean/Std_dev : 249.80 4.06 Card 00 Chip 00 Channel 32 Mean/Std_dev : 249.92 3.26 Card 00 Chip 00 Channel 33 Mean/Std_dev : 250.09 4.02 Card 00 Chip 00 Channel 34 Mean/Std_dev : 249.99 3.32 Card 00 Chip 00 Channel 35 Mean/Std_dev : 249.88 4.02 Card 00 Chip 00 Channel 36 Mean/Std_dev : 249.07 3.24 Card 00 Chip 00 Channel 37 Mean/Std_dev : 249.65 3.96 Card 00 Chip 00 Channel 38 Mean/Std_dev : 250.15 3.17 Card 00 Chip 00 Channel 39 Mean/Std_dev : 248.76 3.69 Card 00 Chip 00 Channel 40 Mean/Std_dev : 249.62 3.30 Card 00 Chip 00 Channel 41 Mean/Std_dev : 248.73 3.15 Card 00 Chip 00 Channel 42 Mean/Std_dev : 249.18 3.98 Card 00 Chip 00 Channel 43 Mean/Std_dev : 249.39 3.06 Card 00 Chip 00 Channel 44 Mean/Std_dev : 249.50 3.95 Card 00 Chip 00 Channel 45 Mean/Std_dev : 250.29 3.09 Card 00 Chip 00 Channel 46 Mean/Std_dev : 249.57 4.03 Card 00 Chip 00 Channel 47 Mean/Std_dev : 249.00 3.21 Card 00 Chip 00 Channel 48 Mean/Std_dev : 249.93 4.07 Card 00 Chip 00 Channel 49 Mean/Std_dev : 249.56 3.08 Card 00 Chip 00 Channel 50 Mean/Std_dev : 249.61 4.01 Card 00 Chip 00 Channel 51 Mean/Std_dev : 249.32 3.04 Card 00 Chip 00 Channel 52 Mean/Std_dev : 249.76 4.18 Card 00 Chip 00 Channel 53 Mean/Std_dev : 250.14 1.46 Card 00 Chip 00 Channel 54 Mean/Std_dev : 250.31 3.10 Card 00 Chip 00 Channel 55 Mean/Std_dev : 250.66 4.10 Card 00 Chip 00 Channel 56 Mean/Std_dev : 250.14 2.94 Card 00 Chip 00 Channel 57 Mean/Std_dev : 249.82 4.08 Card 00 Chip 00 Channel 58 Mean/Std_dev : 249.45 3.02 Card 00 Chip 00 Channel 59 Mean/Std_dev : 250.11 4.19 Card 00 Chip 00 Channel 60 Mean/Std_dev : 249.08 2.92 Card 00 Chip 00 Channel 61 Mean/Std_dev : 249.36 4.12 Card 00 Chip 00 Channel 62 Mean/Std_dev : 249.73 3.02 Card 00 Chip 00 Channel 63 Mean/Std_dev : 248.77 4.15 Card 00 Chip 00 Channel 64 Mean/Std_dev : 250.24 3.27 Card 00 Chip 00 Channel 65 Mean/Std_dev : 249.74 4.18 Card 00 Chip 00 Channel 66 Mean/Std_dev : 249.64 1.46 Card 00 Chip 00 Channel 67 Mean/Std_dev : 249.59 3.01 Card 00 Chip 00 Channel 68 Mean/Std_dev : 250.03 4.16 Card 00 Chip 00 Channel 69 Mean/Std_dev : 249.33 3.17 Card 00 Chip 00 Channel 70 Mean/Std_dev : 249.15 4.17 Card 00 Chip 00 Channel 71 Mean/Std_dev : 249.86 3.05 Card 00 Chip 00 Channel 72 Mean/Std_dev : 249.09 4.19 Card 00 Chip 00 Channel 73 Mean/Std_dev : 249.44 2.96 Card 00 Chip 00 Channel 74 Mean/Std_dev : 249.39 4.28 Card 00 Chip 00 Channel 75 Mean/Std_dev : 249.96 3.14 Card 00 Chip 00 Channel 76 Mean/Std_dev : 249.01 4.19 Card 00 Chip 00 Channel 77 Mean/Std_dev : 249.04 3.08 Card 00 Chip 00 Channel 78 Mean/Std_dev : 250.46 4.34 ----- End of Frame ----- srv(00).cmd(0): fe hped 1 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 01 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 01 Channel 01 Mean/Std_dev : 364.47 7.69 Card 00 Chip 01 Channel 02 Mean/Std_dev : 249.83 0.66 Card 00 Chip 01 Channel 03 Mean/Std_dev : 249.40 5.09 Card 00 Chip 01 Channel 04 Mean/Std_dev : 249.81 3.18 Card 00 Chip 01 Channel 05 Mean/Std_dev : 250.13 5.07 Card 00 Chip 01 Channel 06 Mean/Std_dev : 250.22 3.17 Card 00 Chip 01 Channel 07 Mean/Std_dev : 249.67 4.96 Card 00 Chip 01 Channel 08 Mean/Std_dev : 249.43 3.23 Card 00 Chip 01 Channel 09 Mean/Std_dev : 249.32 5.02 Card 00 Chip 01 Channel 10 Mean/Std_dev : 248.85 3.35 Card 00 Chip 01 Channel 11 Mean/Std_dev : 249.05 4.61 Card 00 Chip 01 Channel 12 Mean/Std_dev : 249.36 3.24 Card 00 Chip 01 Channel 13 Mean/Std_dev : 250.00 4.78 Card 00 Chip 01 Channel 14 Mean/Std_dev : 248.79 3.18 Card 00 Chip 01 Channel 15 Mean/Std_dev : 249.14 1.67 Card 00 Chip 01 Channel 16 Mean/Std_dev : 248.96 4.79 Card 00 Chip 01 Channel 17 Mean/Std_dev : 250.34 3.17 Card 00 Chip 01 Channel 18 Mean/Std_dev : 249.96 4.55 Card 00 Chip 01 Channel 19 Mean/Std_dev : 249.78 3.31 Card 00 Chip 01 Channel 20 Mean/Std_dev : 250.22 4.35 Card 00 Chip 01 Channel 21 Mean/Std_dev : 249.31 3.33 Card 00 Chip 01 Channel 22 Mean/Std_dev : 249.10 4.43 Card 00 Chip 01 Channel 23 Mean/Std_dev : 249.12 3.18 Card 00 Chip 01 Channel 24 Mean/Std_dev : 248.90 4.29 Card 00 Chip 01 Channel 25 Mean/Std_dev : 250.18 3.40 Card 00 Chip 01 Channel 26 Mean/Std_dev : 249.90 4.39 Card 00 Chip 01 Channel 27 Mean/Std_dev : 249.22 3.19 Card 00 Chip 01 Channel 28 Mean/Std_dev : 249.20 1.74 Card 00 Chip 01 Channel 29 Mean/Std_dev : 249.59 4.37 Card 00 Chip 01 Channel 30 Mean/Std_dev : 249.21 3.42 Card 00 Chip 01 Channel 31 Mean/Std_dev : 250.29 4.28 Card 00 Chip 01 Channel 32 Mean/Std_dev : 249.26 3.33 Card 00 Chip 01 Channel 33 Mean/Std_dev : 248.72 4.21 Card 00 Chip 01 Channel 34 Mean/Std_dev : 249.30 3.24 Card 00 Chip 01 Channel 35 Mean/Std_dev : 249.10 4.20 Card 00 Chip 01 Channel 36 Mean/Std_dev : 249.67 3.37 Card 00 Chip 01 Channel 37 Mean/Std_dev : 250.35 4.14 Card 00 Chip 01 Channel 38 Mean/Std_dev : 248.56 3.35 Card 00 Chip 01 Channel 39 Mean/Std_dev : 249.92 3.83 Card 00 Chip 01 Channel 40 Mean/Std_dev : 250.46 3.40 Card 00 Chip 01 Channel 41 Mean/Std_dev : 250.14 3.22 Card 00 Chip 01 Channel 42 Mean/Std_dev : 249.20 4.21 Card 00 Chip 01 Channel 43 Mean/Std_dev : 250.33 3.08 Card 00 Chip 01 Channel 44 Mean/Std_dev : 250.25 4.17 Card 00 Chip 01 Channel 45 Mean/Std_dev : 250.23 3.15 Card 00 Chip 01 Channel 46 Mean/Std_dev : 249.73 4.21 Card 00 Chip 01 Channel 47 Mean/Std_dev : 250.16 3.26 Card 00 Chip 01 Channel 48 Mean/Std_dev : 249.22 4.29 Card 00 Chip 01 Channel 49 Mean/Std_dev : 250.27 3.11 Card 00 Chip 01 Channel 50 Mean/Std_dev : 249.98 4.44 Card 00 Chip 01 Channel 51 Mean/Std_dev : 249.67 2.97 Card 00 Chip 01 Channel 52 Mean/Std_dev : 249.58 4.26 Card 00 Chip 01 Channel 53 Mean/Std_dev : 249.76 1.56 Card 00 Chip 01 Channel 54 Mean/Std_dev : 249.48 3.14 Card 00 Chip 01 Channel 55 Mean/Std_dev : 249.35 4.28 Card 00 Chip 01 Channel 56 Mean/Std_dev : 249.96 3.28 Card 00 Chip 01 Channel 57 Mean/Std_dev : 250.39 4.36 Card 00 Chip 01 Channel 58 Mean/Std_dev : 249.91 3.25 Card 00 Chip 01 Channel 59 Mean/Std_dev : 249.66 4.51 Card 00 Chip 01 Channel 60 Mean/Std_dev : 250.04 3.20 Card 00 Chip 01 Channel 61 Mean/Std_dev : 250.17 4.30 Card 00 Chip 01 Channel 62 Mean/Std_dev : 250.07 3.04 Card 00 Chip 01 Channel 63 Mean/Std_dev : 249.89 4.46 Card 00 Chip 01 Channel 64 Mean/Std_dev : 249.40 3.16 Card 00 Chip 01 Channel 65 Mean/Std_dev : 249.68 4.44 Card 00 Chip 01 Channel 66 Mean/Std_dev : 250.07 1.50 Card 00 Chip 01 Channel 67 Mean/Std_dev : 249.26 3.12 Card 00 Chip 01 Channel 68 Mean/Std_dev : 249.94 4.51 Card 00 Chip 01 Channel 69 Mean/Std_dev : 249.63 3.13 Card 00 Chip 01 Channel 70 Mean/Std_dev : 250.57 4.53 Card 00 Chip 01 Channel 71 Mean/Std_dev : 249.63 3.13 Card 00 Chip 01 Channel 72 Mean/Std_dev : 248.90 4.66 Card 00 Chip 01 Channel 73 Mean/Std_dev : 248.97 3.09 Card 00 Chip 01 Channel 74 Mean/Std_dev : 250.15 4.57 Card 00 Chip 01 Channel 75 Mean/Std_dev : 250.03 3.23 Card 00 Chip 01 Channel 76 Mean/Std_dev : 249.61 4.60 Card 00 Chip 01 Channel 77 Mean/Std_dev : 250.06 3.22 Card 00 Chip 01 Channel 78 Mean/Std_dev : 250.51 4.67 ----- End of Frame ----- srv(00).cmd(0): fe hped 2 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 02 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 02 Channel 01 Mean/Std_dev : 436.95 7.63 Card 00 Chip 02 Channel 02 Mean/Std_dev : 249.23 0.66 Card 00 Chip 02 Channel 03 Mean/Std_dev : 249.71 5.75 Card 00 Chip 02 Channel 04 Mean/Std_dev : 249.51 3.34 Card 00 Chip 02 Channel 05 Mean/Std_dev : 249.09 5.39 Card 00 Chip 02 Channel 06 Mean/Std_dev : 249.98 3.24 Card 00 Chip 02 Channel 07 Mean/Std_dev : 249.52 5.60 Card 00 Chip 02 Channel 08 Mean/Std_dev : 249.78 3.38 Card 00 Chip 02 Channel 09 Mean/Std_dev : 249.21 5.39 Card 00 Chip 02 Channel 10 Mean/Std_dev : 249.41 3.42 Card 00 Chip 02 Channel 11 Mean/Std_dev : 249.31 5.12 Card 00 Chip 02 Channel 12 Mean/Std_dev : 249.44 3.24 Card 00 Chip 02 Channel 13 Mean/Std_dev : 249.14 5.09 Card 00 Chip 02 Channel 14 Mean/Std_dev : 249.97 3.45 Card 00 Chip 02 Channel 15 Mean/Std_dev : 249.97 1.61 Card 00 Chip 02 Channel 16 Mean/Std_dev : 249.10 5.00 Card 00 Chip 02 Channel 17 Mean/Std_dev : 249.99 3.39 Card 00 Chip 02 Channel 18 Mean/Std_dev : 249.13 4.94 Card 00 Chip 02 Channel 19 Mean/Std_dev : 249.33 3.19 Card 00 Chip 02 Channel 20 Mean/Std_dev : 249.84 4.99 Card 00 Chip 02 Channel 21 Mean/Std_dev : 249.56 3.29 Card 00 Chip 02 Channel 22 Mean/Std_dev : 250.49 4.86 Card 00 Chip 02 Channel 23 Mean/Std_dev : 248.78 3.37 Card 00 Chip 02 Channel 24 Mean/Std_dev : 249.02 4.79 Card 00 Chip 02 Channel 25 Mean/Std_dev : 250.21 3.37 Card 00 Chip 02 Channel 26 Mean/Std_dev : 249.20 4.56 Card 00 Chip 02 Channel 27 Mean/Std_dev : 250.24 3.25 Card 00 Chip 02 Channel 28 Mean/Std_dev : 249.46 1.69 Card 00 Chip 02 Channel 29 Mean/Std_dev : 250.16 4.69 Card 00 Chip 02 Channel 30 Mean/Std_dev : 250.43 3.28 Card 00 Chip 02 Channel 31 Mean/Std_dev : 249.70 4.54 Card 00 Chip 02 Channel 32 Mean/Std_dev : 249.79 3.18 Card 00 Chip 02 Channel 33 Mean/Std_dev : 249.20 4.48 Card 00 Chip 02 Channel 34 Mean/Std_dev : 249.73 3.35 Card 00 Chip 02 Channel 35 Mean/Std_dev : 249.23 4.40 Card 00 Chip 02 Channel 36 Mean/Std_dev : 250.21 3.36 Card 00 Chip 02 Channel 37 Mean/Std_dev : 249.08 4.26 Card 00 Chip 02 Channel 38 Mean/Std_dev : 249.18 3.25 Card 00 Chip 02 Channel 39 Mean/Std_dev : 250.47 3.92 Card 00 Chip 02 Channel 40 Mean/Std_dev : 250.01 3.36 Card 00 Chip 02 Channel 41 Mean/Std_dev : 250.05 3.24 Card 00 Chip 02 Channel 42 Mean/Std_dev : 249.06 4.50 Card 00 Chip 02 Channel 43 Mean/Std_dev : 250.08 3.24 Card 00 Chip 02 Channel 44 Mean/Std_dev : 249.76 4.54 Card 00 Chip 02 Channel 45 Mean/Std_dev : 250.32 3.22 Card 00 Chip 02 Channel 46 Mean/Std_dev : 250.01 4.54 Card 00 Chip 02 Channel 47 Mean/Std_dev : 249.59 3.08 Card 00 Chip 02 Channel 48 Mean/Std_dev : 249.35 4.59 Card 00 Chip 02 Channel 49 Mean/Std_dev : 249.38 3.17 Card 00 Chip 02 Channel 50 Mean/Std_dev : 249.33 4.54 Card 00 Chip 02 Channel 51 Mean/Std_dev : 249.48 3.22 Card 00 Chip 02 Channel 52 Mean/Std_dev : 250.19 4.72 Card 00 Chip 02 Channel 53 Mean/Std_dev : 249.25 1.56 Card 00 Chip 02 Channel 54 Mean/Std_dev : 249.09 3.10 Card 00 Chip 02 Channel 55 Mean/Std_dev : 250.39 4.78 Card 00 Chip 02 Channel 56 Mean/Std_dev : 249.47 3.29 Card 00 Chip 02 Channel 57 Mean/Std_dev : 249.74 4.76 Card 00 Chip 02 Channel 58 Mean/Std_dev : 249.47 3.23 Card 00 Chip 02 Channel 59 Mean/Std_dev : 250.04 4.89 Card 00 Chip 02 Channel 60 Mean/Std_dev : 249.22 3.14 Card 00 Chip 02 Channel 61 Mean/Std_dev : 249.11 4.70 Card 00 Chip 02 Channel 62 Mean/Std_dev : 249.97 3.20 Card 00 Chip 02 Channel 63 Mean/Std_dev : 250.47 4.68 Card 00 Chip 02 Channel 64 Mean/Std_dev : 249.16 3.36 Card 00 Chip 02 Channel 65 Mean/Std_dev : 249.74 4.75 Card 00 Chip 02 Channel 66 Mean/Std_dev : 249.72 1.48 Card 00 Chip 02 Channel 67 Mean/Std_dev : 249.51 3.24 Card 00 Chip 02 Channel 68 Mean/Std_dev : 250.60 4.81 Card 00 Chip 02 Channel 69 Mean/Std_dev : 249.60 3.17 Card 00 Chip 02 Channel 70 Mean/Std_dev : 249.29 4.82 Card 00 Chip 02 Channel 71 Mean/Std_dev : 250.17 3.23 Card 00 Chip 02 Channel 72 Mean/Std_dev : 250.59 4.86 Card 00 Chip 02 Channel 73 Mean/Std_dev : 249.90 3.20 Card 00 Chip 02 Channel 74 Mean/Std_dev : 249.62 4.99 Card 00 Chip 02 Channel 75 Mean/Std_dev : 249.74 3.16 Card 00 Chip 02 Channel 76 Mean/Std_dev : 249.77 4.96 Card 00 Chip 02 Channel 77 Mean/Std_dev : 249.47 3.22 Card 00 Chip 02 Channel 78 Mean/Std_dev : 249.74 5.16 ----- End of Frame ----- srv(00).cmd(0): fe hped 3 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 03 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 03 Channel 01 Mean/Std_dev : 253.32 9.61 Card 00 Chip 03 Channel 02 Mean/Std_dev : 249.88 0.68 Card 00 Chip 03 Channel 03 Mean/Std_dev : 250.23 6.50 Card 00 Chip 03 Channel 04 Mean/Std_dev : 249.13 3.71 Card 00 Chip 03 Channel 05 Mean/Std_dev : 250.07 6.53 Card 00 Chip 03 Channel 06 Mean/Std_dev : 248.82 3.74 Card 00 Chip 03 Channel 07 Mean/Std_dev : 249.90 6.14 Card 00 Chip 03 Channel 08 Mean/Std_dev : 249.65 3.50 Card 00 Chip 03 Channel 09 Mean/Std_dev : 249.69 6.03 Card 00 Chip 03 Channel 10 Mean/Std_dev : 249.80 3.45 Card 00 Chip 03 Channel 11 Mean/Std_dev : 249.51 5.79 Card 00 Chip 03 Channel 12 Mean/Std_dev : 250.02 3.60 Card 00 Chip 03 Channel 13 Mean/Std_dev : 249.12 5.57 Card 00 Chip 03 Channel 14 Mean/Std_dev : 250.23 3.53 Card 00 Chip 03 Channel 15 Mean/Std_dev : 249.37 1.63 Card 00 Chip 03 Channel 16 Mean/Std_dev : 249.13 5.73 Card 00 Chip 03 Channel 17 Mean/Std_dev : 249.57 3.46 Card 00 Chip 03 Channel 18 Mean/Std_dev : 250.28 5.66 Card 00 Chip 03 Channel 19 Mean/Std_dev : 249.68 3.60 Card 00 Chip 03 Channel 20 Mean/Std_dev : 249.53 5.37 Card 00 Chip 03 Channel 21 Mean/Std_dev : 249.17 3.42 Card 00 Chip 03 Channel 22 Mean/Std_dev : 250.13 5.50 Card 00 Chip 03 Channel 23 Mean/Std_dev : 249.72 3.49 Card 00 Chip 03 Channel 24 Mean/Std_dev : 249.70 5.27 Card 00 Chip 03 Channel 25 Mean/Std_dev : 249.66 3.53 Card 00 Chip 03 Channel 26 Mean/Std_dev : 249.61 5.16 Card 00 Chip 03 Channel 27 Mean/Std_dev : 250.41 3.56 Card 00 Chip 03 Channel 28 Mean/Std_dev : 249.88 1.81 Card 00 Chip 03 Channel 29 Mean/Std_dev : 249.48 5.23 Card 00 Chip 03 Channel 30 Mean/Std_dev : 250.61 3.57 Card 00 Chip 03 Channel 31 Mean/Std_dev : 249.76 5.12 Card 00 Chip 03 Channel 32 Mean/Std_dev : 249.55 3.65 Card 00 Chip 03 Channel 33 Mean/Std_dev : 249.72 4.89 Card 00 Chip 03 Channel 34 Mean/Std_dev : 249.50 3.48 Card 00 Chip 03 Channel 35 Mean/Std_dev : 250.31 4.79 Card 00 Chip 03 Channel 36 Mean/Std_dev : 249.77 3.45 Card 00 Chip 03 Channel 37 Mean/Std_dev : 249.60 4.75 Card 00 Chip 03 Channel 38 Mean/Std_dev : 250.21 3.54 Card 00 Chip 03 Channel 39 Mean/Std_dev : 250.07 4.39 Card 00 Chip 03 Channel 40 Mean/Std_dev : 249.91 3.63 Card 00 Chip 03 Channel 41 Mean/Std_dev : 248.76 3.52 Card 00 Chip 03 Channel 42 Mean/Std_dev : 249.72 5.17 Card 00 Chip 03 Channel 43 Mean/Std_dev : 249.31 3.54 Card 00 Chip 03 Channel 44 Mean/Std_dev : 249.51 5.20 Card 00 Chip 03 Channel 45 Mean/Std_dev : 249.58 3.38 Card 00 Chip 03 Channel 46 Mean/Std_dev : 250.21 5.34 Card 00 Chip 03 Channel 47 Mean/Std_dev : 250.16 3.52 Card 00 Chip 03 Channel 48 Mean/Std_dev : 248.60 5.27 Card 00 Chip 03 Channel 49 Mean/Std_dev : 249.46 3.43 Card 00 Chip 03 Channel 50 Mean/Std_dev : 250.58 5.21 Card 00 Chip 03 Channel 51 Mean/Std_dev : 249.89 3.38 Card 00 Chip 03 Channel 52 Mean/Std_dev : 249.44 5.34 Card 00 Chip 03 Channel 53 Mean/Std_dev : 250.06 1.54 Card 00 Chip 03 Channel 54 Mean/Std_dev : 249.62 3.38 Card 00 Chip 03 Channel 55 Mean/Std_dev : 250.07 5.44 Card 00 Chip 03 Channel 56 Mean/Std_dev : 249.42 3.44 Card 00 Chip 03 Channel 57 Mean/Std_dev : 249.97 5.33 Card 00 Chip 03 Channel 58 Mean/Std_dev : 249.09 3.47 Card 00 Chip 03 Channel 59 Mean/Std_dev : 249.17 5.43 Card 00 Chip 03 Channel 60 Mean/Std_dev : 250.01 3.62 Card 00 Chip 03 Channel 61 Mean/Std_dev : 250.13 5.39 Card 00 Chip 03 Channel 62 Mean/Std_dev : 250.11 3.46 Card 00 Chip 03 Channel 63 Mean/Std_dev : 249.39 5.51 Card 00 Chip 03 Channel 64 Mean/Std_dev : 249.42 3.36 Card 00 Chip 03 Channel 65 Mean/Std_dev : 249.50 5.29 Card 00 Chip 03 Channel 66 Mean/Std_dev : 249.54 1.55 Card 00 Chip 03 Channel 67 Mean/Std_dev : 249.11 3.36 Card 00 Chip 03 Channel 68 Mean/Std_dev : 250.36 5.58 Card 00 Chip 03 Channel 69 Mean/Std_dev : 249.36 3.62 Card 00 Chip 03 Channel 70 Mean/Std_dev : 248.76 5.51 Card 00 Chip 03 Channel 71 Mean/Std_dev : 250.00 3.30 Card 00 Chip 03 Channel 72 Mean/Std_dev : 249.58 5.75 Card 00 Chip 03 Channel 73 Mean/Std_dev : 249.87 3.42 Card 00 Chip 03 Channel 74 Mean/Std_dev : 249.42 5.68 Card 00 Chip 03 Channel 75 Mean/Std_dev : 250.25 3.34 Card 00 Chip 03 Channel 76 Mean/Std_dev : 249.43 5.82 Card 00 Chip 03 Channel 77 Mean/Std_dev : 249.96 3.44 Card 00 Chip 03 Channel 78 Mean/Std_dev : 250.55 5.73 ----- End of Frame ----- srv(00).cmd(0): fe hped 4 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 04 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 04 Channel 01 Mean/Std_dev : 449.74 5.56 Card 00 Chip 04 Channel 02 Mean/Std_dev : 249.69 0.68 Card 00 Chip 04 Channel 03 Mean/Std_dev : 250.08 4.81 Card 00 Chip 04 Channel 04 Mean/Std_dev : 249.75 3.53 Card 00 Chip 04 Channel 05 Mean/Std_dev : 250.14 4.61 Card 00 Chip 04 Channel 06 Mean/Std_dev : 250.54 3.58 Card 00 Chip 04 Channel 07 Mean/Std_dev : 249.58 4.60 Card 00 Chip 04 Channel 08 Mean/Std_dev : 250.84 3.37 Card 00 Chip 04 Channel 09 Mean/Std_dev : 249.17 4.58 Card 00 Chip 04 Channel 10 Mean/Std_dev : 249.41 3.48 Card 00 Chip 04 Channel 11 Mean/Std_dev : 250.41 4.67 Card 00 Chip 04 Channel 12 Mean/Std_dev : 249.30 3.49 Card 00 Chip 04 Channel 13 Mean/Std_dev : 249.67 4.44 Card 00 Chip 04 Channel 14 Mean/Std_dev : 250.01 3.43 Card 00 Chip 04 Channel 15 Mean/Std_dev : 249.75 1.78 Card 00 Chip 04 Channel 16 Mean/Std_dev : 249.83 4.36 Card 00 Chip 04 Channel 17 Mean/Std_dev : 250.15 3.43 Card 00 Chip 04 Channel 18 Mean/Std_dev : 250.92 4.23 Card 00 Chip 04 Channel 19 Mean/Std_dev : 249.70 3.42 Card 00 Chip 04 Channel 20 Mean/Std_dev : 250.30 4.32 Card 00 Chip 04 Channel 21 Mean/Std_dev : 248.93 3.44 Card 00 Chip 04 Channel 22 Mean/Std_dev : 250.13 4.39 Card 00 Chip 04 Channel 23 Mean/Std_dev : 249.66 3.43 Card 00 Chip 04 Channel 24 Mean/Std_dev : 250.08 4.25 Card 00 Chip 04 Channel 25 Mean/Std_dev : 250.23 3.49 Card 00 Chip 04 Channel 26 Mean/Std_dev : 250.04 4.12 Card 00 Chip 04 Channel 27 Mean/Std_dev : 249.97 3.46 Card 00 Chip 04 Channel 28 Mean/Std_dev : 249.88 1.81 Card 00 Chip 04 Channel 29 Mean/Std_dev : 250.12 4.13 Card 00 Chip 04 Channel 30 Mean/Std_dev : 250.37 3.50 Card 00 Chip 04 Channel 31 Mean/Std_dev : 250.05 4.17 Card 00 Chip 04 Channel 32 Mean/Std_dev : 249.63 3.62 Card 00 Chip 04 Channel 33 Mean/Std_dev : 249.06 4.11 Card 00 Chip 04 Channel 34 Mean/Std_dev : 249.64 3.61 Card 00 Chip 04 Channel 35 Mean/Std_dev : 249.46 4.08 Card 00 Chip 04 Channel 36 Mean/Std_dev : 250.08 3.40 Card 00 Chip 04 Channel 37 Mean/Std_dev : 249.84 4.05 Card 00 Chip 04 Channel 38 Mean/Std_dev : 249.91 3.45 Card 00 Chip 04 Channel 39 Mean/Std_dev : 249.95 3.91 Card 00 Chip 04 Channel 40 Mean/Std_dev : 250.06 3.56 Card 00 Chip 04 Channel 41 Mean/Std_dev : 250.58 3.11 Card 00 Chip 04 Channel 42 Mean/Std_dev : 249.78 4.12 Card 00 Chip 04 Channel 43 Mean/Std_dev : 250.52 3.01 Card 00 Chip 04 Channel 44 Mean/Std_dev : 250.63 4.12 Card 00 Chip 04 Channel 45 Mean/Std_dev : 249.50 3.27 Card 00 Chip 04 Channel 46 Mean/Std_dev : 250.23 4.05 Card 00 Chip 04 Channel 47 Mean/Std_dev : 249.27 3.21 Card 00 Chip 04 Channel 48 Mean/Std_dev : 249.92 4.14 Card 00 Chip 04 Channel 49 Mean/Std_dev : 249.83 3.17 Card 00 Chip 04 Channel 50 Mean/Std_dev : 249.53 4.13 Card 00 Chip 04 Channel 51 Mean/Std_dev : 250.41 3.24 Card 00 Chip 04 Channel 52 Mean/Std_dev : 250.27 4.19 Card 00 Chip 04 Channel 53 Mean/Std_dev : 250.43 1.52 Card 00 Chip 04 Channel 54 Mean/Std_dev : 249.33 3.26 Card 00 Chip 04 Channel 55 Mean/Std_dev : 249.82 4.24 Card 00 Chip 04 Channel 56 Mean/Std_dev : 249.05 3.31 Card 00 Chip 04 Channel 57 Mean/Std_dev : 250.42 4.22 Card 00 Chip 04 Channel 58 Mean/Std_dev : 249.60 3.06 Card 00 Chip 04 Channel 59 Mean/Std_dev : 250.47 4.31 Card 00 Chip 04 Channel 60 Mean/Std_dev : 249.79 3.28 Card 00 Chip 04 Channel 61 Mean/Std_dev : 249.30 4.25 Card 00 Chip 04 Channel 62 Mean/Std_dev : 249.68 3.07 Card 00 Chip 04 Channel 63 Mean/Std_dev : 249.64 4.29 Card 00 Chip 04 Channel 64 Mean/Std_dev : 249.67 3.22 Card 00 Chip 04 Channel 65 Mean/Std_dev : 249.89 4.30 Card 00 Chip 04 Channel 66 Mean/Std_dev : 250.70 1.50 Card 00 Chip 04 Channel 67 Mean/Std_dev : 249.54 3.15 Card 00 Chip 04 Channel 68 Mean/Std_dev : 249.84 4.47 Card 00 Chip 04 Channel 69 Mean/Std_dev : 249.68 3.14 Card 00 Chip 04 Channel 70 Mean/Std_dev : 249.44 4.41 Card 00 Chip 04 Channel 71 Mean/Std_dev : 251.00 3.09 Card 00 Chip 04 Channel 72 Mean/Std_dev : 249.26 4.45 Card 00 Chip 04 Channel 73 Mean/Std_dev : 251.20 3.24 Card 00 Chip 04 Channel 74 Mean/Std_dev : 250.52 4.59 Card 00 Chip 04 Channel 75 Mean/Std_dev : 249.37 3.30 Card 00 Chip 04 Channel 76 Mean/Std_dev : 250.17 4.72 Card 00 Chip 04 Channel 77 Mean/Std_dev : 249.65 3.14 Card 00 Chip 04 Channel 78 Mean/Std_dev : 249.95 4.66 ----- End of Frame ----- srv(00).cmd(0): fe hped 5 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 05 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 05 Channel 01 Mean/Std_dev : 458.17 7.77 Card 00 Chip 05 Channel 02 Mean/Std_dev : 249.40 0.68 Card 00 Chip 05 Channel 03 Mean/Std_dev : 249.82 5.17 Card 00 Chip 05 Channel 04 Mean/Std_dev : 250.17 3.52 Card 00 Chip 05 Channel 05 Mean/Std_dev : 249.46 4.88 Card 00 Chip 05 Channel 06 Mean/Std_dev : 249.65 3.52 Card 00 Chip 05 Channel 07 Mean/Std_dev : 249.46 4.76 Card 00 Chip 05 Channel 08 Mean/Std_dev : 249.34 3.47 Card 00 Chip 05 Channel 09 Mean/Std_dev : 249.83 4.80 Card 00 Chip 05 Channel 10 Mean/Std_dev : 249.45 3.50 Card 00 Chip 05 Channel 11 Mean/Std_dev : 249.40 4.75 Card 00 Chip 05 Channel 12 Mean/Std_dev : 249.73 3.56 Card 00 Chip 05 Channel 13 Mean/Std_dev : 250.54 4.57 Card 00 Chip 05 Channel 14 Mean/Std_dev : 250.35 3.46 Card 00 Chip 05 Channel 15 Mean/Std_dev : 249.92 1.63 Card 00 Chip 05 Channel 16 Mean/Std_dev : 249.64 4.59 Card 00 Chip 05 Channel 17 Mean/Std_dev : 250.01 3.57 Card 00 Chip 05 Channel 18 Mean/Std_dev : 249.63 4.66 Card 00 Chip 05 Channel 19 Mean/Std_dev : 249.73 3.41 Card 00 Chip 05 Channel 20 Mean/Std_dev : 250.13 4.50 Card 00 Chip 05 Channel 21 Mean/Std_dev : 250.11 3.50 Card 00 Chip 05 Channel 22 Mean/Std_dev : 249.96 4.53 Card 00 Chip 05 Channel 23 Mean/Std_dev : 249.75 3.45 Card 00 Chip 05 Channel 24 Mean/Std_dev : 249.66 4.55 Card 00 Chip 05 Channel 25 Mean/Std_dev : 250.00 3.44 Card 00 Chip 05 Channel 26 Mean/Std_dev : 249.82 4.44 Card 00 Chip 05 Channel 27 Mean/Std_dev : 249.99 3.57 Card 00 Chip 05 Channel 28 Mean/Std_dev : 249.93 1.80 Card 00 Chip 05 Channel 29 Mean/Std_dev : 249.85 4.49 Card 00 Chip 05 Channel 30 Mean/Std_dev : 250.12 3.56 Card 00 Chip 05 Channel 31 Mean/Std_dev : 249.64 4.62 Card 00 Chip 05 Channel 32 Mean/Std_dev : 249.85 3.64 Card 00 Chip 05 Channel 33 Mean/Std_dev : 250.20 4.40 Card 00 Chip 05 Channel 34 Mean/Std_dev : 249.86 3.54 Card 00 Chip 05 Channel 35 Mean/Std_dev : 250.14 4.26 Card 00 Chip 05 Channel 36 Mean/Std_dev : 250.09 3.53 Card 00 Chip 05 Channel 37 Mean/Std_dev : 250.67 4.32 Card 00 Chip 05 Channel 38 Mean/Std_dev : 250.05 3.55 Card 00 Chip 05 Channel 39 Mean/Std_dev : 249.31 4.00 Card 00 Chip 05 Channel 40 Mean/Std_dev : 250.58 3.61 Card 00 Chip 05 Channel 41 Mean/Std_dev : 250.91 3.28 Card 00 Chip 05 Channel 42 Mean/Std_dev : 249.40 4.46 Card 00 Chip 05 Channel 43 Mean/Std_dev : 250.68 3.26 Card 00 Chip 05 Channel 44 Mean/Std_dev : 249.46 4.43 Card 00 Chip 05 Channel 45 Mean/Std_dev : 249.90 3.27 Card 00 Chip 05 Channel 46 Mean/Std_dev : 249.54 4.49 Card 00 Chip 05 Channel 47 Mean/Std_dev : 249.49 3.20 Card 00 Chip 05 Channel 48 Mean/Std_dev : 250.45 4.36 Card 00 Chip 05 Channel 49 Mean/Std_dev : 250.12 3.22 Card 00 Chip 05 Channel 50 Mean/Std_dev : 250.11 4.50 Card 00 Chip 05 Channel 51 Mean/Std_dev : 250.21 3.32 Card 00 Chip 05 Channel 52 Mean/Std_dev : 249.91 4.45 Card 00 Chip 05 Channel 53 Mean/Std_dev : 249.13 1.59 Card 00 Chip 05 Channel 54 Mean/Std_dev : 250.56 3.30 Card 00 Chip 05 Channel 55 Mean/Std_dev : 249.99 4.61 Card 00 Chip 05 Channel 56 Mean/Std_dev : 250.69 3.17 Card 00 Chip 05 Channel 57 Mean/Std_dev : 248.61 4.63 Card 00 Chip 05 Channel 58 Mean/Std_dev : 250.12 3.21 Card 00 Chip 05 Channel 59 Mean/Std_dev : 251.07 4.65 Card 00 Chip 05 Channel 60 Mean/Std_dev : 249.74 3.24 Card 00 Chip 05 Channel 61 Mean/Std_dev : 249.89 4.70 Card 00 Chip 05 Channel 62 Mean/Std_dev : 250.07 3.24 Card 00 Chip 05 Channel 63 Mean/Std_dev : 250.22 4.82 Card 00 Chip 05 Channel 64 Mean/Std_dev : 250.19 3.33 Card 00 Chip 05 Channel 65 Mean/Std_dev : 250.72 4.76 Card 00 Chip 05 Channel 66 Mean/Std_dev : 250.09 1.51 Card 00 Chip 05 Channel 67 Mean/Std_dev : 249.56 3.27 Card 00 Chip 05 Channel 68 Mean/Std_dev : 249.88 4.83 Card 00 Chip 05 Channel 69 Mean/Std_dev : 249.94 3.17 Card 00 Chip 05 Channel 70 Mean/Std_dev : 250.41 4.88 Card 00 Chip 05 Channel 71 Mean/Std_dev : 250.19 3.23 Card 00 Chip 05 Channel 72 Mean/Std_dev : 249.98 4.94 Card 00 Chip 05 Channel 73 Mean/Std_dev : 250.63 3.46 Card 00 Chip 05 Channel 74 Mean/Std_dev : 249.28 5.02 Card 00 Chip 05 Channel 75 Mean/Std_dev : 249.64 3.23 Card 00 Chip 05 Channel 76 Mean/Std_dev : 249.58 5.11 Card 00 Chip 05 Channel 77 Mean/Std_dev : 249.04 3.21 Card 00 Chip 05 Channel 78 Mean/Std_dev : 250.18 5.26 ----- End of Frame ----- srv(00).cmd(0): fe hped 6 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 06 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 06 Channel 01 Mean/Std_dev : 425.78 7.11 Card 00 Chip 06 Channel 02 Mean/Std_dev : 248.64 0.65 Card 00 Chip 06 Channel 03 Mean/Std_dev : 248.53 5.38 Card 00 Chip 06 Channel 04 Mean/Std_dev : 247.86 3.41 Card 00 Chip 06 Channel 05 Mean/Std_dev : 248.97 5.08 Card 00 Chip 06 Channel 06 Mean/Std_dev : 249.34 3.36 Card 00 Chip 06 Channel 07 Mean/Std_dev : 249.11 4.82 Card 00 Chip 06 Channel 08 Mean/Std_dev : 248.64 3.33 Card 00 Chip 06 Channel 09 Mean/Std_dev : 248.50 4.71 Card 00 Chip 06 Channel 10 Mean/Std_dev : 249.15 3.34 Card 00 Chip 06 Channel 11 Mean/Std_dev : 249.02 4.88 Card 00 Chip 06 Channel 12 Mean/Std_dev : 248.29 3.25 Card 00 Chip 06 Channel 13 Mean/Std_dev : 248.81 4.81 Card 00 Chip 06 Channel 14 Mean/Std_dev : 249.69 3.40 Card 00 Chip 06 Channel 15 Mean/Std_dev : 248.65 1.64 Card 00 Chip 06 Channel 16 Mean/Std_dev : 248.78 4.70 Card 00 Chip 06 Channel 17 Mean/Std_dev : 248.42 3.44 Card 00 Chip 06 Channel 18 Mean/Std_dev : 249.63 4.63 Card 00 Chip 06 Channel 19 Mean/Std_dev : 249.28 3.45 Card 00 Chip 06 Channel 20 Mean/Std_dev : 248.85 4.66 Card 00 Chip 06 Channel 21 Mean/Std_dev : 249.51 3.29 Card 00 Chip 06 Channel 22 Mean/Std_dev : 248.18 4.56 Card 00 Chip 06 Channel 23 Mean/Std_dev : 249.31 3.35 Card 00 Chip 06 Channel 24 Mean/Std_dev : 248.73 4.56 Card 00 Chip 06 Channel 25 Mean/Std_dev : 249.59 3.54 Card 00 Chip 06 Channel 26 Mean/Std_dev : 248.62 4.66 Card 00 Chip 06 Channel 27 Mean/Std_dev : 247.85 3.46 Card 00 Chip 06 Channel 28 Mean/Std_dev : 248.48 1.70 Card 00 Chip 06 Channel 29 Mean/Std_dev : 249.31 4.45 Card 00 Chip 06 Channel 30 Mean/Std_dev : 248.44 3.38 Card 00 Chip 06 Channel 31 Mean/Std_dev : 248.40 4.53 Card 00 Chip 06 Channel 32 Mean/Std_dev : 249.41 3.37 Card 00 Chip 06 Channel 33 Mean/Std_dev : 248.57 4.43 Card 00 Chip 06 Channel 34 Mean/Std_dev : 248.96 3.30 Card 00 Chip 06 Channel 35 Mean/Std_dev : 248.75 4.47 Card 00 Chip 06 Channel 36 Mean/Std_dev : 248.99 3.30 Card 00 Chip 06 Channel 37 Mean/Std_dev : 248.63 4.48 Card 00 Chip 06 Channel 38 Mean/Std_dev : 249.16 3.55 Card 00 Chip 06 Channel 39 Mean/Std_dev : 248.94 4.02 Card 00 Chip 06 Channel 40 Mean/Std_dev : 249.64 3.46 Card 00 Chip 06 Channel 41 Mean/Std_dev : 248.07 3.07 Card 00 Chip 06 Channel 42 Mean/Std_dev : 249.17 4.91 Card 00 Chip 06 Channel 43 Mean/Std_dev : 249.10 3.04 Card 00 Chip 06 Channel 44 Mean/Std_dev : 249.59 4.67 Card 00 Chip 06 Channel 45 Mean/Std_dev : 248.48 3.15 Card 00 Chip 06 Channel 46 Mean/Std_dev : 248.33 4.65 Card 00 Chip 06 Channel 47 Mean/Std_dev : 248.58 3.16 Card 00 Chip 06 Channel 48 Mean/Std_dev : 249.56 4.72 Card 00 Chip 06 Channel 49 Mean/Std_dev : 248.09 3.19 Card 00 Chip 06 Channel 50 Mean/Std_dev : 248.70 4.80 Card 00 Chip 06 Channel 51 Mean/Std_dev : 249.00 3.18 Card 00 Chip 06 Channel 52 Mean/Std_dev : 248.33 4.73 Card 00 Chip 06 Channel 53 Mean/Std_dev : 249.05 1.43 Card 00 Chip 06 Channel 54 Mean/Std_dev : 248.19 3.17 Card 00 Chip 06 Channel 55 Mean/Std_dev : 249.23 4.78 Card 00 Chip 06 Channel 56 Mean/Std_dev : 249.20 3.36 Card 00 Chip 06 Channel 57 Mean/Std_dev : 248.38 4.75 Card 00 Chip 06 Channel 58 Mean/Std_dev : 248.49 3.09 Card 00 Chip 06 Channel 59 Mean/Std_dev : 247.85 5.04 Card 00 Chip 06 Channel 60 Mean/Std_dev : 248.51 3.24 Card 00 Chip 06 Channel 61 Mean/Std_dev : 249.73 5.02 Card 00 Chip 06 Channel 62 Mean/Std_dev : 248.74 3.23 Card 00 Chip 06 Channel 63 Mean/Std_dev : 248.46 4.88 Card 00 Chip 06 Channel 64 Mean/Std_dev : 248.42 3.12 Card 00 Chip 06 Channel 65 Mean/Std_dev : 248.46 5.04 Card 00 Chip 06 Channel 66 Mean/Std_dev : 248.34 1.46 Card 00 Chip 06 Channel 67 Mean/Std_dev : 249.73 3.05 Card 00 Chip 06 Channel 68 Mean/Std_dev : 249.09 4.98 Card 00 Chip 06 Channel 69 Mean/Std_dev : 248.37 3.11 Card 00 Chip 06 Channel 70 Mean/Std_dev : 248.05 5.15 Card 00 Chip 06 Channel 71 Mean/Std_dev : 248.58 3.22 Card 00 Chip 06 Channel 72 Mean/Std_dev : 249.40 5.14 Card 00 Chip 06 Channel 73 Mean/Std_dev : 249.02 3.18 Card 00 Chip 06 Channel 74 Mean/Std_dev : 248.39 5.16 Card 00 Chip 06 Channel 75 Mean/Std_dev : 248.50 3.19 Card 00 Chip 06 Channel 76 Mean/Std_dev : 249.48 5.20 Card 00 Chip 06 Channel 77 Mean/Std_dev : 248.68 3.18 Card 00 Chip 06 Channel 78 Mean/Std_dev : 248.43 5.55 ----- End of Frame ----- srv(00).cmd(0): fe hped 7 * getsummary Frame payload: 954 bytes --- Start of Moni Frame (V.0) FE 00 (952 bytes) -- Card 00 Chip 07 Channel 00 Mean/Std_dev : 250.00 0.00 Card 00 Chip 07 Channel 01 Mean/Std_dev : 408.35 8.53 Card 00 Chip 07 Channel 02 Mean/Std_dev : 249.43 0.69 Card 00 Chip 07 Channel 03 Mean/Std_dev : 250.22 5.96 Card 00 Chip 07 Channel 04 Mean/Std_dev : 250.28 3.70 Card 00 Chip 07 Channel 05 Mean/Std_dev : 250.06 5.52 Card 00 Chip 07 Channel 06 Mean/Std_dev : 249.24 3.60 Card 00 Chip 07 Channel 07 Mean/Std_dev : 249.89 5.63 Card 00 Chip 07 Channel 08 Mean/Std_dev : 249.93 3.73 Card 00 Chip 07 Channel 09 Mean/Std_dev : 250.13 5.38 Card 00 Chip 07 Channel 10 Mean/Std_dev : 250.26 3.51 Card 00 Chip 07 Channel 11 Mean/Std_dev : 250.30 5.42 Card 00 Chip 07 Channel 12 Mean/Std_dev : 249.04 3.68 Card 00 Chip 07 Channel 13 Mean/Std_dev : 248.51 5.26 Card 00 Chip 07 Channel 14 Mean/Std_dev : 249.86 3.54 Card 00 Chip 07 Channel 15 Mean/Std_dev : 249.43 1.69 Card 00 Chip 07 Channel 16 Mean/Std_dev : 249.74 5.27 Card 00 Chip 07 Channel 17 Mean/Std_dev : 250.56 3.70 Card 00 Chip 07 Channel 18 Mean/Std_dev : 249.59 5.13 Card 00 Chip 07 Channel 19 Mean/Std_dev : 250.12 3.65 Card 00 Chip 07 Channel 20 Mean/Std_dev : 248.88 5.08 Card 00 Chip 07 Channel 21 Mean/Std_dev : 249.78 3.61 Card 00 Chip 07 Channel 22 Mean/Std_dev : 250.25 5.21 Card 00 Chip 07 Channel 23 Mean/Std_dev : 249.16 3.57 Card 00 Chip 07 Channel 24 Mean/Std_dev : 248.78 5.13 Card 00 Chip 07 Channel 25 Mean/Std_dev : 249.47 3.55 Card 00 Chip 07 Channel 26 Mean/Std_dev : 250.05 5.13 Card 00 Chip 07 Channel 27 Mean/Std_dev : 249.30 3.60 Card 00 Chip 07 Channel 28 Mean/Std_dev : 249.45 1.74 Card 00 Chip 07 Channel 29 Mean/Std_dev : 250.63 5.01 Card 00 Chip 07 Channel 30 Mean/Std_dev : 250.20 3.67 Card 00 Chip 07 Channel 31 Mean/Std_dev : 250.13 5.04 Card 00 Chip 07 Channel 32 Mean/Std_dev : 249.51 3.65 Card 00 Chip 07 Channel 33 Mean/Std_dev : 249.43 4.95 Card 00 Chip 07 Channel 34 Mean/Std_dev : 250.17 3.73 Card 00 Chip 07 Channel 35 Mean/Std_dev : 249.56 4.82 Card 00 Chip 07 Channel 36 Mean/Std_dev : 249.96 3.82 Card 00 Chip 07 Channel 37 Mean/Std_dev : 248.51 5.08 Card 00 Chip 07 Channel 38 Mean/Std_dev : 249.81 3.81 Card 00 Chip 07 Channel 39 Mean/Std_dev : 250.17 4.61 Card 00 Chip 07 Channel 40 Mean/Std_dev : 249.84 3.86 Card 00 Chip 07 Channel 41 Mean/Std_dev : 249.66 3.27 Card 00 Chip 07 Channel 42 Mean/Std_dev : 249.33 5.22 Card 00 Chip 07 Channel 43 Mean/Std_dev : 249.78 3.33 Card 00 Chip 07 Channel 44 Mean/Std_dev : 249.52 5.31 Card 00 Chip 07 Channel 45 Mean/Std_dev : 250.20 3.38 Card 00 Chip 07 Channel 46 Mean/Std_dev : 250.37 5.29 Card 00 Chip 07 Channel 47 Mean/Std_dev : 249.56 3.30 Card 00 Chip 07 Channel 48 Mean/Std_dev : 249.94 5.31 Card 00 Chip 07 Channel 49 Mean/Std_dev : 249.70 3.32 Card 00 Chip 07 Channel 50 Mean/Std_dev : 249.99 5.27 Card 00 Chip 07 Channel 51 Mean/Std_dev : 249.66 3.41 Card 00 Chip 07 Channel 52 Mean/Std_dev : 249.77 5.21 Card 00 Chip 07 Channel 53 Mean/Std_dev : 249.74 1.43 Card 00 Chip 07 Channel 54 Mean/Std_dev : 250.08 3.39 Card 00 Chip 07 Channel 55 Mean/Std_dev : 249.78 5.46 Card 00 Chip 07 Channel 56 Mean/Std_dev : 250.23 3.37 Card 00 Chip 07 Channel 57 Mean/Std_dev : 249.24 5.43 Card 00 Chip 07 Channel 58 Mean/Std_dev : 250.21 3.42 Card 00 Chip 07 Channel 59 Mean/Std_dev : 249.63 5.51 Card 00 Chip 07 Channel 60 Mean/Std_dev : 249.47 3.51 Card 00 Chip 07 Channel 61 Mean/Std_dev : 250.15 5.47 Card 00 Chip 07 Channel 62 Mean/Std_dev : 250.44 3.43 Card 00 Chip 07 Channel 63 Mean/Std_dev : 249.38 5.58 Card 00 Chip 07 Channel 64 Mean/Std_dev : 250.19 3.28 Card 00 Chip 07 Channel 65 Mean/Std_dev : 248.87 5.61 Card 00 Chip 07 Channel 66 Mean/Std_dev : 249.90 1.47 Card 00 Chip 07 Channel 67 Mean/Std_dev : 249.98 3.41 Card 00 Chip 07 Channel 68 Mean/Std_dev : 249.58 5.69 Card 00 Chip 07 Channel 69 Mean/Std_dev : 249.27 3.51 Card 00 Chip 07 Channel 70 Mean/Std_dev : 249.67 5.53 Card 00 Chip 07 Channel 71 Mean/Std_dev : 249.56 3.58 Card 00 Chip 07 Channel 72 Mean/Std_dev : 249.56 5.75 Card 00 Chip 07 Channel 73 Mean/Std_dev : 249.95 3.47 Card 00 Chip 07 Channel 74 Mean/Std_dev : 249.36 5.85 Card 00 Chip 07 Channel 75 Mean/Std_dev : 249.45 3.46 Card 00 Chip 07 Channel 76 Mean/Std_dev : 249.49 5.86 Card 00 Chip 07 Channel 77 Mean/Std_dev : 250.18 3.56 Card 00 Chip 07 Channel 78 Mean/Std_dev : 249.69 6.08 ----- End of Frame ----- srv(00).cmd(0): fe hped 0:15 * setthr 250 5.0 0 Tdcm(0) Fem(00): hped setthr done on 1264 histograms. Underflow: 0 Overflow: 0 ped: 250 thr: 5.00 srv(00).cmd(0): be serve_target 1 0 Tdcm(0) Serve_Target <- 1 (0) >srv(00).cmd(0): fe fec_enable 0 Tdcm(0) Fem(00) Reg(1) = 0x24000f (2359311) FEC_Enable: 1 srv(00).cmd(0): fe mode after 0 Tdcm(0) Fem(00) Reg(0) <- 0x400 srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0101 0x0101 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x101 0x101 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0202 0x0202 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x202 0x202 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0303 0x0303 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x303 0x303 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0404 0x0404 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x404 0x404 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0505 0x0505 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x505 0x505 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0606 0x0606 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x606 0x606 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0707 0x0707 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x707 0x707 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0808 0x0808 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x808 0x808 (1 chip verified) srv(00).cmd(0): fe after 0 read 3 0 Tdcm(0) Fem(00) After(0) Reg(3): 0x0 0x101 0x101 srv(00).cmd(0): fe after 1 read 3 0 Tdcm(0) Fem(00) After(1) Reg(3): 0x0 0x202 0x202 srv(00).cmd(0): fe after 2 read 3 0 Tdcm(0) Fem(00) After(2) Reg(3): 0x0 0x303 0x303 srv(00).cmd(0): fe after 3 read 3 0 Tdcm(0) Fem(00) After(3) Reg(3): 0x0 0x404 0x404 srv(00).cmd(0): fe after 4 read 3 0 Tdcm(0) Fem(00) After(4) Reg(3): 0x0 0x505 0x505 srv(00).cmd(0): fe after 5 read 3 0 Tdcm(0) Fem(00) After(5) Reg(3): 0x0 0x606 0x606 srv(00).cmd(0): fe after 6 read 3 0 Tdcm(0) Fem(00) After(6) Reg(3): 0x0 0x707 0x707 srv(00).cmd(0): fe after 7 read 3 0 Tdcm(0) Fem(00) After(7) Reg(3): 0x0 0x808 0x808 srv(00).cmd(0): fe after 0 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 1 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(1) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 2 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(2) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 3 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(3) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 4 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(4) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 5 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(5) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 6 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(6) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): fe after 7 wrchk 3 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(7) Reg(3) <- 0x0 0x0 0x0 (1 chip verified) srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: srv(00).cmd(0): -1 Tdcm(0) Unknown command: (0) >srv(00).cmd(0): fe moni T 0 0 Tdcm(0) Fem(00) FEC_T: 26.969 degC srv(00).cmd(0): fe moni V 0 0 Tdcm(0) Fem(00) FEC_Vdd: 3.270 V srv(00).cmd(0): fe moni A 0 0 Tdcm(0) Fem(00) FEC_Vad: 1.630 V srv(00).cmd(0): fe moni I 0 0 Tdcm(0) Fem(00) FEC_I: 1.377 A srv(00).cmd(0): fe moni S 0 0 Tdcm(0) Fem(00) FEC_Serial: 0f0000027e3c7826 srv(00).cmd(0): fe moni T 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni V 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni A 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni I 1 -203 Tdcm(0) Fem(00): ow_GetConversion failed (status=0x0000) srv(00).cmd(0): fe moni S 1 0 Tdcm(0) Fem(00) FEC_Serial: 0000000000000000 srv(00).cmd(0): fe moni T 2 0 Tdcm(0) Fem(00) FEM_T: 26.625 degC srv(00).cmd(0): fe moni V 2 0 Tdcm(0) Fem(00) FEM_Vdd: 2.490 V srv(00).cmd(0): fe moni A 2 0 Tdcm(0) Fem(00) FEM_Vad: 4.915 V srv(00).cmd(0): fe moni I 2 0 Tdcm(0) Fem(00) FEM_I: 1.782 A srv(00).cmd(0): fe moni S 2 0 Tdcm(0) Fem(00) FEM_Serial: 890000024d14dc26 srv(00).cmd(0): fe xadc read 0 0 Tdcm(0) Fem(00) Temperature = 37.897 srv(00).cmd(0): fe xadc read 1 0 Tdcm(0) Fem(00) Vccint = 0.994 srv(00).cmd(0): fe xadc read 2 0 Tdcm(0) Fem(00) Vccaux = 1.791 srv(00).cmd(0): fe xadc read 3 0 Tdcm(0) Fem(00) Vp-Vn = 1.477 srv(00).cmd(0): fe xadc read 16 0 Tdcm(0) Fem(00) V_input = 4.922 srv(00).cmd(0): fe xadc read 17 0 Tdcm(0) Fem(00) I_input = 1.782 srv(00).cmd(0): fe xadc read 18 0 Tdcm(0) Fem(00) V_33 = 3.311 srv(00).cmd(0): fe xadc read 19 0 Tdcm(0) Fem(00) V_25 = 2.517 srv(00).cmd(0): fe xadc read 20 0 Tdcm(0) Fem(00) I_25 = 0.224 srv(00).cmd(0): fe xadc read 21 0 Tdcm(0) Fem(00) V_18 = 1.799 srv(00).cmd(0): fe xadc read 22 0 Tdcm(0) Fem(00) I_18 = 0.344 srv(00).cmd(0): fe xadc read 23 0 Tdcm(0) Fem(00) I_10 = 0.167 srv(00).cmd(0): fe sfp info 0 Tdcm(0) SFP FINISARCORP. FTLF8519P3BNLA srv(00).cmd(0): fe sfp moni 0 Tdcm(0) SFP Vcc(V) 3.260 I(mA) 4.9 Txp(uW) 324.2 Rxp(uW) 303.0 T(dgC) 27.4 TX_Fault 0 RX_Los 0 (0) >srv(00).rep(?): path: "../data/" srv(00).cmd(0): path ../data srv(00).cmd(0): DAQ 0 srv(00).cmd(0): credits restore 8 1 F srv(00).cmd(0): daq 0xFFFFFF F 0 Tdcm(0): daq paused srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe emit_hit_cnt 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe emit_empty_ch 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe emit_lst_cell_rd 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe keep_rst 0 0 Tdcm(0) Fem(00) Reg(0) <- 0x0 srv(00).cmd(0): fe skip_rst 2 0 Tdcm(0) Fem(00) Reg(0) <- 0x40000 srv(00).cmd(0): fe test_enable 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe test_mode 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe tdata A 0x1FE 0 Tdcm(0) Fem(00) TestData: linear ramp from 0 to 509 srv(00).cmd(0): fe test_zbt 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): fe keep_fco 0 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 srv(00).cmd(0): fe after 0:7 test_mode 0x1 0 Tdcm(0) Fem(00) After(0:7) Reg(1) <- Test_mode=calibration srv(00).cmd(0): fe after 0:7 write 3 0x0 0x0001 0x0000 0 Tdcm(0) Fem(00) After(0:7) Reg(3) <- 0x0 0x1 0x0 (wrote 8 chip(s)) srv(00).cmd(0): fe after 0:7 write 4 0x0 0x0000 0x0000 0 Tdcm(0) Fem(00) After(0:7) Reg(4) <- 0x0 0x0 0x0 (wrote 8 chip(s)) srv(00).cmd(0): fe pulser model T2K2 0 Tdcm(0) Fem(00) pulser_DAC <- 3 (T2K2) srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): fe pulser delay 5000 0 Tdcm(0) Fem(00) Reg(3) <- 0x1388 srv(00).cmd(0): fe pulser enable 1 0 Tdcm(0) Fem(00) Reg(3) <- 0x10000 srv(00).cmd(0): fe pulser ft_enable 0 0 Tdcm(0) Fem(00) Reg(3) <- 0x0 srv(00).cmd(0): fe subtract_ped 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x4000 srv(00).cmd(0): fe zero_suppress 1 0 Tdcm(0) Fem(00) Reg(0) <- 0x2000 srv(00).cmd(0): fe zs_pre_post 4 8 0 Tdcm(0) Fem(00) Reg(5) <- 0xc4 srv(00).cmd(0): fe zs_keep_tail 0 0 Tdcm(0) Fem(00) Reg(5) <- 0x0 srv(00).cmd(0): be eb keep_fem_soe 0 0 Tdcm(0) Reg(0) <- 0x0 srv(00).cmd(0): be eb check_ev_nb 1 0 Tdcm(0) Reg(0) <- 0x800000 srv(00).cmd(0): be eb check_ev_ts 1 0 Tdcm(0) Reg(0) <- 0x1000000 srv(00).cmd(0): be eb ts_tolerance 0 0 Tdcm(0) Reg(0) = 0x1a40000 (27525120) Time_Stamp_Tolerance +/-: 0 srv(00).cmd(0): be eb do_eof_on_eoe 1 0 Tdcm(0) Reg(0) <- 0x8000000 srv(00).cmd(0): be event_limit 0x1 0 Tdcm(0) Reg(6) <- 0x200 srv(00).cmd(0): be trig_rate 0 10 0 Tdcm(0) Reg(6) <- 0xa Opened result file: "../data/R2024_12_12-09_40_05-000.txt" srv(00).cmd(0): fopen asc srv(00).cmd(0): vflags 0x0 srv(00).cmd(0): DAQ 1000000000000 srv(00).cmd(0): be restart 0 Tdcm(0) Reg(5) <- restart done srv(00).cmd(0): be ss_trig_ena 1 0 Tdcm(0) Reg(6) <- 0x10000 srv(00).cmd(0): be ss_trig_delay 6 0 Tdcm(0) Reg(14) <- 0x6 srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): be isobus 0x0C 0 Tdcm(0) Reg(5) <- 0x0000000c ( CLR_EVCNT CLR_TSTAMP auto-clear) srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser ampl 7500 0 Tdcm(0) Fem(00) Pulser_Amplitude <- 0x1d4c srv(00).cmd(0): be isobus 0x60 0 Tdcm(0) Reg(5) <- 0x00000060 ( WCK_SYNCH SCA_START auto-clear) srv(00).cmd(0): DAQ 0 DAQ: collected 0 B (0 bytes 1000000000000 bytes left) speed: 0.00 MB/s srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): fe pulser ampl 7500 0 Tdcm(0) Fem(00) Pulser_Amplitude <- 0x1d4c srv(00).cmd(0): be isobus 0x60 0 Tdcm(0) Reg(5) <- 0x00000060 ( WCK_SYNCH SCA_START auto-clear) srv(00).cmd(0): DAQ 0 DAQ: collected 730 B (730 bytes 999999999270 bytes left) speed: 0.00 MB/s srv(00).cmd(0): sleep 1 srv(00).cmd(0): fe pulser base 8000 0 Tdcm(0) Fem(00) Pulser_Base <- 0x1f40 srv(00).cmd(0): fe pulser load 0 Tdcm(0) Fem(00) Reg(1) <- 0x0 GEN_GO pulsed srv(00).cmd(0): be trig_ena 0 0 Tdcm(0) Reg(6) <- 0x0 srv(00).cmd(0): sleep 2 srv(00).cmd(0): DAQ 100000000 srv(00).cmd(0): sleep 1 srv(00).cmd(0): DAQ 0 DAQ: collected 0 B (0 bytes 100000000 bytes left) speed: 0.00 MB/s File closed srv(00).cmd(0): fclose (0) >srv(00).cmd(0): quit CmdFetcher_Main: completed. FemArray_ReceiveLoop: completed. femarray: Thread_Join done. eventbuilder: Thread_Join done.