65 nm meeting
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Bat 20 - uElec (https://cern.zoom.us/j/69600555186?pwd=eVcxUTBnc2J0bWwyQ3RBM0ttZkN6Zz09)
Bat 20 - uElec
https://cern.zoom.us/j/69600555186?pwd=eVcxUTBnc2J0bWwyQ3RBM0ttZkN6Zz09
- MOSS design, Fred
- submission postponed "before summer"
- standard cells, first release achieved => Gianluca asked for a discussion to review modif choices
- Need for the next generation of the matrix read-out block
- improvement expected on compactness, but not detailed
- Question about LVS status: not clear to Fred
- MOST design, Szymon
- same difficulties than MOSS / delay
- Szymon is working on the required modif for pixel biasing => quite the heavy task
- Note: dedicated meetings are on Thursday morning
- CE65v2, Andrei
- small sensors are expected 25th May
- version C (for charge) is fully ready (LVS, DRC with some violations)
- 15 sensors: 5 pitch/arrangement x 3 sensing nodes (std, N-implant with gap, N-implant continuous)
- single front-end AC-Amp, can be used to emulate DC-SF and DC-Amp
- new advised pad ring not used: not possible
- to be send tomorrow and wait for Walter's feedback
- seems improbable that CERN would share the pixel front-end used in MOSS
- no manpower at CERN to work on any adaptation
- Question about preliminary observation of RTS in CE65 test: should we adapt transistors?
- there are 3 flavours of transistors, any use of them?
- could be done if we decide it
- APTS never reported that, they use the LV transistor flavour (CE65v1 uses HV 3.3 transistor)
- Sergey remembers that kind of RTS noise was at least mentioned once
- there are 3 flavours of transistors, any use of them?
- Test beam, Sergey, Yitao
- issue with acquisition (de-sync of CE65) solved by workaround (throwing empty events)
- detail: USB overflow happening from time to time
- experts (CERN, Cagliari) has to investigate
- Already covered:
- A4, B4, C4 at HV=10V
- To be done remotely
- C4 HV=10V, Psub=-3V
- C4 HV=0V, Psub=-3V
- Sergey back to CERN in Friday afternoon, beam stops Wednesday morning
- 4 days of data taking
- 1 day = 2 chips
- Program from Friday (Sergey back to CERN)
- Priority 0: D4 at HV=10V (will finalize our MAIN priorities)
- Priority 1: A4, B4 HV=1,2,3,4V on AC-Amp
- Priority 2: irradiated chips if working at all
- About irradiated sensors
- TID on B4 can be studied in lab: 100, 500 MRad
- all DC-SF, DC-Amp, AC-Amp with HV=10V
- neutron irradiated: 1e15 neq/cm2
- 2 sensors available of each flavour A,B,C,D
- std program for all sensors at HV=10V and also Psub=-3V
- will be tested Saturday
- TID on B4 can be studied in lab: 100, 500 MRad
- What to ask to Yitao
- Note that with EUDAQ, correlation DUT-tracker can be checked
- tune signal cuts and geometrical cuts and cluster size (5x5) to get Landau distribution, starting with B4
- then gross efficiency and resolution
- then move to A4, D4, C4
- Get noise maps from runs without beam
- About the issue with DAQ
- request to Miko to get one ALPIDE (and needed telescope parts) at IPHC and exercise the acquisition
- under discussion between Sergey and Miko
- issue with acquisition (de-sync of CE65) solved by workaround (throwing empty events)
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