# Program created: 2021_10_07-12-44-53
Commands sent: 76
0	cmd: fe 0 sca enable 0                       
1	cmd: be pump ena 0x0                         
2	cmd: be restart                              
3	cmd: fe 0 mode after                         
4	cmd: fe 0 fec_enable 1                       
5	cmd: fe 0 asic_mask 0x0000                   
6	cmd: fe test_enable 0                        
7	cmd: fe test_mode 0                          
8	cmd: fe test_zbt 0                           
9	cmd: fe adc 0 model AD9637                   
10	cmd: fe adc 0 write 0x14 0x00                
11	cmd: fe adc 1 model AD9637                   
12	cmd: fe adc 1 write 0x14 0x00                
13	cmd: fe 0 after 0:7 gain 120                 
14	cmd: fe 0 after 0:7 time 100                 
15	cmd: fe 0 after 0:7 write 2  0x0             
16	cmd: fe 0 after 0:7 en_mkr_rst 1             
17	cmd: fe 0 after 0:7 rst_level 0              
18	cmd: fe 0 after 0:7 rd_from_0 0              
19	cmd: fe 0 after 0:7 test_digout 0            
20	cmd: fe 0 polarity 0:7 0                     
21	cmd: fe 0 forceon_all 1                      
22	cmd: fe 0 sca cnt 510                        
23	cmd: fe 0 sca wckdiv 4                       
24	cmd: fe 0 crc32_insert_ena 1                 
25	cmd: fe 0 keep_fco 0                         
26	cmd: fe 0 rst_len 1                          
27	cmd: fe 0 skip_rst 0                         
28	cmd: fe 0 keep_rst 1                         
29	cmd: fe 0 emit_lst_cell_rd 1                 
30	cmd: fe 0 trig_ena 8                         
31	cmd: fe 0 sca enable 1                       
32	cmd: fe fra_timeout 0                        
33	cmd: be 0 crc32_check_ena 1                  
34	cmd: be 0 serve_target 1                     
35	cmd: be 0 pump timed 1                       
36	cmd: be 0 pump timeout 0                     
37	cmd: be 0 pump ena fe_workset                
38	cmd: be 0 eb keep_fem_soe 1                  
39	cmd: be 0 eb check_ev_nb 1                   
40	cmd: be 0 eb check_ev_ts 1                   
41	cmd: be 0 eb ts_tolerance 0                  
42	cmd: be 0 eb run 1                           
43	cmd: be 0 event_limit 2                      
44	cmd: be 0 trig_rate 0 5                      
45	cmd: fe 0 subtract_ped 0                     
46	cmd: fe 0 hped 0:7 * offset 0                
47	cmd: fe 0 hped 0:7 * clr                     
48	cmd: be 0 serve_target 2                     
49	cmd: be 0 isobus 0x0C                        
50	cmd: be 0 isobus 0x20                        
51	cmd: be 0 trig_ena 1                         
52	cmd: be 0 trig_ena 0                         
53	cmd: fe 0 hped 0 * getsummary                
54	cmd: fe 0 hped 1 * getsummary                
55	cmd: fe 0 hped 2 * getsummary                
56	cmd: fe 0 hped 3 * getsummary                
57	cmd: fe 0 hped 4 * getsummary                
58	cmd: fe 0 hped 5 * getsummary                
59	cmd: fe 0 hped 6 * getsummary                
60	cmd: fe 0 hped 7 * getsummary                
61	cmd: fe 0 hped 0:7 * centermean 250          
62	cmd: fe 0 subtract_ped 1                     
63	cmd: fe 0 hped 0:7 * clr                     
64	cmd: be 0 trig_ena 1                         
65	cmd: be 0 trig_ena 0                         
66	cmd: fe 0 hped 0 * getsummary                
67	cmd: fe 0 hped 1 * getsummary                
68	cmd: fe 0 hped 2 * getsummary                
69	cmd: fe 0 hped 3 * getsummary                
70	cmd: fe 0 hped 4 * getsummary                
71	cmd: fe 0 hped 5 * getsummary                
72	cmd: fe 0 hped 6 * getsummary                
73	cmd: fe 0 hped 7 * getsummary                
74	cmd: fe 0 hped 0:7 * setthr 250.0 5.0        
75	cmd: be 0 serve_target 1                     
Responses got: 76
0	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x0
1	code:  0 resp: 0 Tdcm(2) Reg(4) <- 0x0
2	code:  0 resp: 0 Tdcm(2) Reg(5) <- restart done
3	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x400
4	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(1) <- 0x40000
5	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(9) <- 0x0
6	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(5) <- 0x0
7	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(5) <- 0x0
8	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(5) <- 0x0
9	code:  0 resp: 0 Tdcm(2) Fem(00) ADC_model <- 3 (AD9637)
10	code:  0 resp: 0 Tdcm(2) Fem(00) Front-End ADC Reg(20) <- 0x0 (0)
11	code:  0 resp: 0 Tdcm(2) Fem(00) ADC_model <- 3 (AD9637)
12	code:  0 resp: 0 Tdcm(2) Fem(00) Front-End ADC Reg(20) <- 0x0 (0)
13	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(1) <- Gain=120fC
14	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(1) <- Shaping=116ns
15	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(2) <- 0x0 (wrote 8 chip(s))
16	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(2) <- Marker=1
17	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(2) <- Marker_Level=0
18	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(2) <- Read_From_0=0
19	code:  0 resp: 0 Tdcm(2) Fem(00) After(0:7) Reg(2) <- Test_Digout=0
20	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(3) <- 0x0 (performed 8 actions)
21	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x1000
22	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x1fe
23	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(5) <- 0x40000
24	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(6) <- 0x40
25	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(1) <- 0x0
26	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x800
27	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x0
28	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x10000
29	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(5) <- 0x2000
30	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(2) <- 0x80000000
31	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x100000
32	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(6) <- 0x0
33	code:  0 resp: 0 Tdcm(2) Reg(3) <- 0x00000020
34	code:  0 resp: 0 Tdcm(2) Serve_Target <- 1
35	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x40000
36	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x0
37	code:  0 resp: 0 Tdcm(2) Reg(4) <- 0x1
38	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x400000
39	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x800000
40	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x1000000
41	code:  0 resp: 0 Tdcm(2) Reg(0) = 0x1c40000 (29622272) Time_Stamp_Tolerance +/-: 0
42	code:  0 resp: 0 Tdcm(2) Reg(0) <- 0x200000
43	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x400
44	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x5
45	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x0
46	code:  0 resp: 0 Tdcm(2) Fem(00): hped offset done on 632 histograms. Underflow: 0 Overflow: 0 ped: 0
47	code:  0 resp: 0 Tdcm(2) Fem(00): hped clr done on 632 histograms. Underflow: 0 Overflow: 0
48	code:  0 resp: 0 Tdcm(2) Serve_Target <- 2
49	code:  0 resp: 0 Tdcm(2) Reg(5) <- 0x0000000c ( CLR_EVCNT CLR_TSTAMP  auto-clear)
50	code:  0 resp: 0 Tdcm(2) Reg(5) <- 0x00000020 ( SCA_START  auto-clear)
51	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x1000
52	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x0
53	code:  0 resp: Pedestal data for chip: [0] count 79
54	code:  0 resp: Pedestal data for chip: [0 1] count 158
55	code:  0 resp: Pedestal data for chip: [0 1 2] count 237
56	code:  0 resp: Pedestal data for chip: [0 1 2 3] count 316
57	code:  0 resp: Pedestal data for chip: [0 1 2 3 4] count 395
58	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5] count 474
59	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5 6] count 553
60	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5 6 7] count 632
61	code:  0 resp: 0 Tdcm(2) Fem(00): hped centermean done on 632 histograms. Underflow: 8 Overflow: 0 ped: 250
62	code:  0 resp: 0 Tdcm(2) Fem(00) Reg(0) <- 0x4000
63	code:  0 resp: 0 Tdcm(2) Fem(00): hped clr done on 632 histograms. Underflow: 0 Overflow: 0
64	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x1000
65	code:  0 resp: 0 Tdcm(2) Reg(6) <- 0x0
66	code:  0 resp: Pedestal data for chip: [0] count 79
67	code:  0 resp: Pedestal data for chip: [0 1] count 158
68	code:  0 resp: Pedestal data for chip: [0 1 2] count 237
69	code:  0 resp: Pedestal data for chip: [0 1 2 3] count 316
70	code:  0 resp: Pedestal data for chip: [0 1 2 3 4] count 395
71	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5] count 474
72	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5 6] count 553
73	code:  0 resp: Pedestal data for chip: [0 1 2 3 4 5 6 7] count 632
74	code:  0 resp: 0 Tdcm(2) Fem(00): hped setthr done on 632 histograms. Underflow: 0 Overflow: 0 ped: 250 thr: 5.00
75	code:  0 resp: 0 Tdcm(2) Serve_Target <- 1

